
October 13 1995, Draft 1
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Chapter 7 Software Debugging
31 will not be a frequent occurrence, and values in the range five or six are to be
expected.
PI–Am29460 Setup and Limitations
As with the PI–Am29040 preprocessor, a number of restrictions and
preparation steps apply when using the PI–Am29460 preprocessor:
1.
The trace processing algorithm places the value X_SLAVE_ in the DATA
column for all instruction accesses. It is necessary to have access to the COFF
file(s) for the loaded program to ensure the X_SLAVE_ value is replaced with
the actual 29K instruction executed. Debuggers such as UDB can retain
multiple COFF file images at the same time. This enables simultaneous
tracing of application space and operating system space (say, interrupt
handlers).
2.
Considering MCU performed memory accesses, only data accesses are
reported. Data transfer is shown at the time it appears on the system busses;
which, for data stores, may be several cycles after the corresponding STORE
instruction.
Two bus 29K processors have OPT pins and lower (A1–A0) address pins
which indicate the size and alignment of the object currently being accessed.
The Am29460 microcontroller does not have these pins. Consequently it is
not possible to determine the alignment and size for reads of sub word–sized
objects. Fortunately, the microcontroller has four byte enable pins which are
used for data writes. This enables the alignment and size of objects which are
written to be determined, and improves the trace reporting for data writes.
Only MCU accesses performed on behalf of the Am29460 processor are
reported. Accesses initiated by another processor via the PCI interface will
not appear in the trace.
3.
Considering accesses to the PCI bus, as with MCU accesses, only data
transfers are reported. By monitoring the PCI command provided during the
address–phase of a PCI access, it is possible to determine the object size for
sub word–sized objects.
4.
The PI–Am29460 preprocessor does not reconstruct 32–bit MCU addresses.
This can complicate logic analyzer triggering. One solution is to use the
on–chip breakpoint control registers to generate a _SYNC pulse which is
then used to trigger the analyzer. The UDB debugger has a convenient user
interface for specifying breakpoint control register operation. Unfortunately,
however, breakpoint control registers are a limited resource, and they are also
used to control program execution.
5.
Unlike a scalar processor, processed trace lines with the Am29460, indicate
multiple instruction execution per trace line. The number of instructions