October 13 1995, Draft 1
351
Chapter 7 Software Debugging
AMD generally supplies OS–boot along with MiniMON29K for each 29K
evaluation system. Because OS–boot supports the HIF system call services it is use-
ful for running evaluation software. However, OS–boot is a simple operating system,
it does not support multi–tasking or other grander operating system concepts. As well
as supplying MiniMON29K and OS–boot in EPROM, users get the source to OS–
boot, enabling them to make any necessary changes.
Typically, users will add operating system code to support additional peripheral
devices. Or, use OS–boot as a means of launching into another more sophisticated
operating system. This is described in more detail later. The technique is useful be-
cause it avoids the need to install MiniMON29K with the new operating system in
EPROM. The new operating system need merely be down–loaded via Mini-
MON29K debugger messages into available target memory.
This section does not describe OS–boot in detail. It is mainly an overview of its
operation. Hopefully users will gain an understanding of its relevance in the debug
processes.
7.4.1 Register Usage
According to the register usage convention, an operating system is free to use
global registers in the range
gr64–gr95
. OS–boot uses a good number of these regis-
ters. Many of the floating–point instructions and some integer instructions are not
implemented directly by hardware with some members of the 29K family. This re-
quires that
trapware
be used to support the
non–existing
instructions. The floating–
point trapware included with OS–boot requires as much as 15 temporary registers
and three static registers to support the trapware code. OS–boot is typically config-
ured to assign registers
it0–kt11
(
gr64–gr79
) for temporary use and
ks13–ks15
(
gr93–gr95
) for static use.
The exact register assignment for OS–boot is determined by file
register.s
in the
osboot directory. Other than trapware support, registers are required for run–time
management and HIF services. These registers are typically allocated from the range
ks0–ks12
(
gr80–gr92
). There are a number of free registers for those requiring to add
operating system support code.
7.4.2 OS–boot Operation
Operation begins at address label
os_cold_start
. The processor special regis-
ters, such as CPS and CFG, are initialized to enable the processor start–up sequence
to commence. OS–boot does not contain very much cold–start code. However, the
code is complicated by the incorporation of options enabling any member of the 29K
family to be dealt with.
The vector table entries are constructed. Most of the unused entries are set to
cause DebugCore entry. Thus, should any unexpected trap or interrupt happen the
DebugCore will be able to report it. The vector table is normally placed at the start of
data memory.