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Chapter 8 Selecting a Processor
The Stanford benchmark is relatively small and can have high instruction cache
hit ratios. It also does not exhibit the large data movement activities typical of
communications applications. For this reason a LAPD benchmark, which is larger
and more representative of communication applications is also used. The LAPD
acronym stands for Link Access Protocol–D. It is an ISDN protocol used by the
communications industry when sending packet information between a caller and
callee. The benchmark is intended to measure a processor’s ability to crunch a
typical
layered protocol stack. The LAPD code used is based on a prior AMD,
“AmLink”, software product. The benchmark is in three parts: Send an information
package and receive an un–numbered acknowledge; Receive an information
package and respond with an un–numbered acknowledge; And send an information
package and receive an information package. Results are presented in terms of
geometric mean values for packet switching speeds for the three parts (the geometric
mean is found by multiplying the three results and taking the cube–root of the
product).
The performance results presented can act as a guideline for your own
application. However, the only certain way to know a processor’s performance for
any particular processor/memory configuration is to benchmark your own code on
the system or an Architectural Simulator.
8.1
THE 29K FAMILY
Chapter 1 described the features of the 29K family members in detail. The
family is divided into three main groupings: three–bus microprocessors, two–bus
microprocessors, and microcontrollers. This section will concentrate on the
sometimes difficult task of selecting a particular family member. When designing a
new microprocessor system, price and performance expectations restrict the choice
of available processors. It is not acceptable to select a
high–end
processor with a fast
memory system when the budget requires a low system cost. It is equally important to
be aware that a
low–end
processor with inexpensive memory system may not have
the required performance. There can also be other design restrictions, such as low
power consumption or short development time, that further influence the processor
selection. The problem of selecting a processor is dominated by the difficulty of
evaluating relative performance of different processor and memory combinations.
To help resolve this problem, I have simulated a wide range of potential systems and
determined their relative performance. The results are presented in the following
sections.
The review is divided into two sections: first, microcontrollers; and second, all
types of microprocessors. The division is natural. One of the first decisions to be
made is whether to use a microcontroller or a microprocessor.