
October 13 1995, Draft 1
406
Addendum to –– Evaluating and Programming the 29K RISC Family
# macro table
#
––––––
macro m=mview –f “iss”
simulator; view –u\r”
macro m=mview –f “LA”
{lb2}
trace; view –u\r”
button position command
––––
–––––
{lb1}
––––––––––––––––– . . .
“mktarget ISS 1 29040 dr_gio 0 ios_udi
“mktarget LA 1 29040 dr_gio 0 ios_udi –be
7.9.4 Corelis PI–Am29040 Preprocessor
A logic analyzer preprocessor simplifies the connection of the analyzer to the
target system. The principles behind its operation were discussed in section 7.8. This
section briefly deals with the operating details encountered with the Am29040 pre-
processor. To prepare the preprocessor based system, a number of steps must be take:
1.
The PI–Am29040 Preprocessor hardware unit replaces the Am29040
processor in the target system. The preprocessor contains two Am29040
processors, one operating in master mode, the other in slave mode. Earlier
version of the preprocessor required that certain pins such as MEMCLK
(H–14) on the slave processor be removed. Later versions do not require pin
removal. There is a jumper option for removing the slave MEMCLK signal if
it is configured as an output. If MEMCLK is configured as an input, the slave
and master MEMCLKs must be tied together. Because of the high speed
operation of Am29040 based systems, the use of PGA socket extenders
should be limited as they add to signal propagation delays. It is often
desirable to add extenders to the preprocessor connection pins to protect them
from damage. If a pin gets broken, it is less expensive to replace a socket than
to replace the preprocessor. Zero ohm resistors have been incorporated in
series with a number of signal pins, such as MEMCLK and INCLK.
Impedance matching, and hence better signal conditioning, can be achieved
by replacing these resistors with an appropriate value resistor.
2.
If HP16550A logic analyzer cards are being used with the HP16500B system,
then two cards should be wired together in accordance with the HP
Installation Manual. Two analyzer cards provide a total of 12 trace pods.
Assuming the cards are located in slots D and E, pod E1 (slot E – master)
should be connected to position J1 on the preprocessor. Pod E2 to position J2,
and so on. Pods D1–D3 should be connected to J7–J9 (see Table 7-5). The
analyzer configuration file POD_040._D will format the analyzer cards for
this configuration. (The ._D file name postfix, is because the master analyzer
card is located in card cage slot D.) The POD_040 configuration file is
available from AMD or Corelis. It is important to obtain a copy of the
configuration file, as it is much too time consuming to reassign the
pod–to–label mapping by hand.