參數(shù)資料
型號(hào)： TMS34020
廠商： Texas Instruments, Inc.
英文描述： GRAPHICS PROCESSORS
中文描述： 圖形處理器
文件頁(yè)數(shù)： 60/82頁(yè)
文件大?。?/td> 1359K
代理商： TMS34020
TMS34020, TMS34020A
GRAPHICS PROCESSORS
SPVS004D – MARCH 1990 – REVISED NOVEMBER 1993
60
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
PARAMETER MEASUREMENT INFORMATION
QW*
QX*
QY*
QZ*
tt(SG)
td(SGNV-SGV)
td(SGNV-SGV)
th(SGV-SGNV)
tt(SG)
th(SGV-SGNV)
th(CKx-SGNV)
td(CKx-SGV)
th(CKx-SGNV)
LCLKx
SIGNAL a
SIGNAL b
tw(SGH)
tw(SGL)
th(SGV-SGNV)
td(SGNV-SGV)
td(CKx-SGV)
(see Note A)
*See clock stretch, page 21.
indicates the point at which the signal has attained a valid level.
NOTE A: Any of these quarter phases could be 2tQ if they are stretched. See clock stretch, page 21.
Figure 35. Output Signal Characteristics
All timing parameters relative to the circled points on the diagram have a fast and a slow value. Determine which
value to use for any parameter by the name of the signal that has the circle on it.
example of how to use the general output signal characteristics
Assume a system is using a TMS34020-32. Determine the maximum time from the start of the falling edge of
ALTCH to the time when data must be valid on the LAD bus for a local memory write cycle.
From the local memory write cycle diagram on page 27, the time from the falling edge of ALTCH to valid data
on the LAD bus is roughly Q3 + Q4; i.e., 2t
Q
. A more precise value can be obtained by using the table of output
signal characteristics.
The parameter of interest is t
d(SGNV-SGV)
. Note that in the diagram above, there are two representations of
t
d(SGNV-SGV)
that relate SIGNALa and SIGNALb (the third representation of this parameter relates SIGNALb to
itself and is not useful in this example). Let SIGNALa represent ALTCH because ALTCH is making a transition
first. Let SIGNALb represent the LAD bus. By definition, the signal becoming valid (SGV) determines whether
the fast value or the slow value from the table is used. On the diagram, the SGV points are marked with a circle.
In this case, for parameter t
d(SGNV-SGV)
, SGV is the LAD bus. LAD is in the slow group, so the maximum value
for t
d(SGNV-SGV)
is nt
Q
+ 22. The value for nis 2 from the analysis of the diagram on page 27. Thus, the maximum
time from the start of the falling edge of ALTCH to the time when data must be valid on the LAD bus for a local
memory write cycle is 2t
Q
+ 22 ns.
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