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| 型號(hào)： | TMS34020 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | GRAPHICS PROCESSORS |
| 中文描述： | 圖形處理器 |
| 文件頁數(shù)： | 21/82頁 |
| 文件大小： | 1359K |
| 代理商： | TMS34020 |
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TMS34020, TMS34020A
GRAPHICS PROCESSORS
SPVS004D – MARCH 1990 – REVISED NOVEMBER 1993
21
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
instruction set
The TMS34020 instruction set can be divided into five categories:
1.
2.
3.
4.
5.
Graphics instructions.
Coprocessor instructions.
Move instructions.
General-purpose instructions.
Program control and context switching.
Specialized graphics instructionsmanipulate pixel data that is accessed via memory addresses or XY
coordinates. These instructions include graphics operations, such as array and raster ops, pixel processing,
windowing, plane masking, pixel masking, and transparency. Coprocessorinstructions allow for the control and
data flow to and from coprocessors that reside in the system. Moveinstructions comprehend the bit-addressing
and field operations, which manipulate fields of data using linear addressing for transfer to and from memory
and the register file. General purposeinstructions provide a complete set of arithmetic and Boolean operations
on the register file, as well as general program control and data processing. Program control and context
switchinginstructions allow the user to control flow and to save and restore information using instructions with
both register-direct and absolute operands.
clock stretch
The TMS34020A supports a clock stretching mechanism, which is described in outline below.
With advances in semiconductor manufacturing, new versions of the TMS34020A can be made, each
supporting a higher CLKIN frequency. The increase in CLKIN frequency means that the TMS34020A machine
cycles execute more quickly, with a consequent increase in code execution speed. However, there comes a
point when, as the machine cycle time becomes shorter, the local memory control signals begin to violate DRAM
and VRAM timing parameters for certain types of memory access.
The clock-stretch mechanism allows the TMS34020A to slow down and execute those critical local memory
cycles, while still benefiting from the accelerated processing allowed by higher CLKIN frequencies during
noncritical memory access cycles.
Exact timing issues will vary from system to system, reflecting differences in bus buffering, etc., but broadly
speaking the clock-stretch mechanism allows the system designer to interface to slower (and hence cheaper
and more available) memory devices than the designer could use if no stretch mechanism were available.
A normal, unstretched machine cycle consists of four quarter cycles, Q1, Q2, Q3, and Q4. A stretched cycle
consists of five quarter cycles Q1, Q2, Q3, and Q4a, and Q4b.
When clock-stretch mode is enabled, the fourth machine quarter cycle may be stretched to twice its original
length. This stretching takes place only when the TMS34020A attempts certain types of memory cycle.
Q4
Q3
Q2
Q1
Q4b
Q4a
Q3
Q2
Q1
Stretched Cycle
Normal Cycle
Normal Cycle
Normal Cycle
Q4
Q3
Q2
Q1
Q4
Q3
Q2
Q1
Normal Sequence
Possible New Sequence
The stretch is achieved by holding the internal TMS34020A clocks in the Q4 state for an extra quarter cycle so
all the device outputs remain unchanged during Q4a and Q4b. The TMS34020A stretches only certain machine
cycles so that the execution of code is not slowed unnecessarily.
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