
TMS34020, TMS34020A
GRAPHICS PROCESSORS
SPVS004D – MARCH 1990 – REVISED NOVEMBER 1993
23
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
The following are examples of stretch-mode memory operations.
two 32-bit nonpage-mode reads
READ
ADDR
READ
ADDR
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
READ
ADDR
READ
ADDR
4
3
2
1
4
4
3
1
4
3
2
4
4
3
2
1
1
2
Stretch
Stretch
Stretch Mode Enabled
Stretch Mode Disabled
one 32-bit page-mode read-modify-write
WRITE
READ
ADDR
4
3
2
1
4
3
2
1
4
3
2
1
WRITE
READ
ADDR
4
3
2
4
4
3
2
4
4
3
2
1
1
1
Stretch
Stretch
Stretch Mode Enabled
Stretch Mode Disabled
three 32-bit page-mode reads
READ
READ
READ
ADDR
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
READ
READ
READ
ADDR
4
3
2
1
4
3
1
4
3
2
4
4
3
2
1
1
2
Stretch
Stretch Mode Enabled
Stretch Mode Disabled
The stretched cycles are designed to accommodate worst-case 32-bit page-mode accesses, so during some
nonpage-mode memory accesses, stretches that are not essential may be generated. For example:
one 32-bit nonpage-mode read-write
WRITE
ADDR
READ
ADDR
4
3
2
1
4
3
2
1
4
3
2
1
4
3
2
1
WRITE
ADDR
READ
ADDR
4
3
2
1
4
4
3
4
4
3
2
4
4
3
2
1
1
2
Stretch
Stretch
Stretch Mode Enabled
Stretch Mode Disabled
1
Stretch
Stretches are inserted in read-modify-write accesses to help ease bus turn-around timings. In the above
example, the second stretch is not needed to help these timings because the read/write turn-around has the
whole of the address cycle to evaluate.