
TMS34020, TMS34020A
GRAPHICS PROCESSORS
SPVS004D – MARCH 1990 – REVISED NOVEMBER 1993
17
POST OFFICE BOX 1443
HOUSTON, TEXAS 77251–1443
The following table illustrates the actual logical address bits output on each of the RCA lines during row and
column intervals for each of the four VRAM modes and states of CAMD:
ROW TIME
COLUMN TIME
RCA BIT
64K
256K
1M
4M
CAMD = 0
CAMD = 1
256K
64K
1M
4M
12
24
25
26
27
16
23
26
15
28
11
23
24
25
26
15
22
14
14
14
10
22
23
24
25
14
13
13
13
13
9
21
22
23
24
13
12
12
12
12
8
20
21
22
23
12
11
11
11
11
7
19
20
21
22
11
10
10
10
10
6
18
19
20
21
10
9
9
9
9
5
17
18
19
20
9
8
8
8
8
4
16
17
18
19
8
7
7
7
7
3
15
16
17
18
7
6
6
6
6
2
14
15
16
17
6
5
5
5
5
1
13
14
15
16
5
4
4
4
4
0
12
13
14
15
4
4
4
4
16
In 64K mode with CAMD=0, any eight adjacent RCA0–RCA12 pins output 16 contiguous logical address bits.
The eight most significant addresses are output during row-address time, while the least significant addresses
are output during column-address time. Logical addresses 12 through 16 are output twice during a memory
cycle (during both RAS and CAS falling edges) but at different pins. This allows a variety of VRAM memory
organizations and decoding schemes to be used. When CAMD = 1, the addresses output during
column-address time are changed such that a new logical address mapping occurs, allowing connection of the
RCA signals directly to 256K or 1M DRAMs.
Similarly, for each of the other VRAM modes, direct connection is provided for other DRAM modes requiring
larger matrices than the configuration mode. The following table gives examples of the connections using this
feature.
CONNECTIONS TO RCA FOR CAMD = 1
RCA
64K
256K
1M
4M
12
1M
×
32
1M
×
16
1M
×
32
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
16
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
32
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
NN
4M
×
16
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
16M
×
32
11
1M
×
32
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
NN
1M
×
16
10
256K
×
32
256K
×
NN
256K
×
NN
256K
×
NN
256K
×
NN
256K
×
NN
256K
×
NN
256K
×
NN
256K
×
NN
256K
×
16
9
8
7
6
5
4
3
2
1
0
16M
×
32
NOTE:
NN is used for either 16-bit (
×
16) or 32-bit (
×
32) memory connections.