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參數(shù)資料
| 型號(hào)： | HMS30C7202N |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Highly-intergrated MPU |
| 中文描述： | 高intergrated微處理器 |
| 文件頁數(shù)： | 94/179頁 |
| 文件大?。?/td> | 2127K |
| 代理商： | HMS30C7202N |
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HMS30C7202N
2004 MagnaChip Semiconductor Ltd. All Rights Reserved. Version 1.1
- 89 -
Counter block
The Counter block tracks the incoming data stream in order to detect the following conditions: reset, suspend,
and turnaround. It also signals to the transmit logic (Output NRZI and bit stuff) when the bus is idle so
transmission can begin.
Generation and Checking block
The Generation and Checking block checks incoming CRC5 and CRC16 data fields, and generates CRC16
across outgoing data fields. It uses the CRC polynomial and remainder specified in the USB Specification
Version 1.1.
Device Interface
The DEV shown in Figure 9-4: Device Interface works at the packet and byte level to connect a number of
endpoints to the SIE. It understands the USB protocol for incoming and outgoing packets, so it knows when to
grab data and how to correctly respond to incoming packets. A large portion of the DEV is devoted to the setup,
configuration, and control features of the USB. As shown in Figure 9-4: Device Interface the DEV is divided
into three blocks: Device Controller, Device ROM, and Start of Frame. The three blocks are described in the
following sections.
D e v ic e C o n tro lle r
C T L
S ta rt o f fra m e g e n e ra tio n
S O F
E n d p o in ts
S IE
Figure 9-3 USB Device Interface Device Controller
Device Controller
The Device Controller contains a state machine that understands the USB protocol. The (SIE) provides the
Device Controller with the type of packet, address value, endpoint value, and data stream for each incoming
packet. The Device Controller then checks to see if the packet is targeted to the device by comparing the
address/endpoint values with internal registers that were loaded with address and endpoint values during the
USB enumeration process. Assuming the address/endpoint is a match, the Device Controller then interprets
the packet. Data is passed on to the endpoint for all packets except SETUP packets, which are handled
specially. Data toggle bits (DATA0 and DATA1 as defined by the USB spec) are maintained by the Device
Controller. For IN data packets (device to host) the Device Controller sends either the maximum number of
bytes in a packet or the number of bytes available from the endpoint. All packets are acknowledged as per the
spec. For SETUP packets, the incoming data is extracted into the relevant internal fields, and then the
appropriate action is carried out. Table 9-7: Supported Setup Requests lists the types of setup operations that
are supported.
Setup Request
Value
Supported
Get Status
0
Device, Interface, Endpoint
Clear Feature
1
Endpoints Only
Set Feature
3
Not supported
Set Address
5
Device
Get Descriptor
6
Device
Set Descriptor
7
Not supported
Table 9-19 USB Supported Setup Requests
Start of Frame
The Start of Frame logic generates a pulse whenever either the incoming Start of Frame (SOF) packet arrives
or approximately 1 ms after it the last one arrived. This allows an isochronous endpoint to stay in sync even if
the SOF packet has been garbled.
Setup Request
Get Configuration
Set Configuration
Get Interface
Set Interface
Synch Frame
Value
8
9
10
11
12
Supported
Device
Device
Not supported
Not supported
Not supported
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