參數(shù)資料
型號(hào)： HMS30C7202N
廠商： Electronic Theatre Controls, Inc.
英文描述： Highly-intergrated MPU
中文描述： 高intergrated微處理器
文件頁數(shù)： 9/179頁
文件大?。?/td> 2127K
代理商： HMS30C7202N
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁當(dāng)前第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁
HMS30C7202N
2004 MagnaChip Semiconductor Ltd. All Rights Reserved. Version 1.1
- 4 -
9.5.4
9.5.5
9.5.5.1
GCTRL................................................................................................................................................... 90
9.5.5.2
EPCTRL................................................................................................................................................. 90
9.5.5.3
INTMASK.............................................................................................................................................. 91
9.5.5.4
INTSTAT................................................................................................................................................ 91
9.5.5.5
PWR....................................................................................................................................................... 92
9.5.5.6
DEVID................................................................................................................................................... 92
9.5.5.7
DEVCLASS........................................................................................................................................... 92
9.5.5.8
INTCLASS............................................................................................................................................. 92
9.5.5.9
SETUP0 / SETUP1 ................................................................................................................................ 94
9.5.5.10
ENDP0RD.......................................................................................................................................... 94
9.5.5.11
ENDP0WT......................................................................................................................................... 94
9.5.5.12
ENDP1RD.......................................................................................................................................... 94
9.5.5.13
ENDP2WT......................................................................................................................................... 94
External Signals......................................................................................................................................... 90
Registers..................................................................................................................................................... 90
10
SLOW AMBA PERIPHERALS.......................................................................................................................... 95
10.1
ADC
I
NTERFACE
C
ONTROLLER
............................................................................................................................ 95
10.1.1
External Signals......................................................................................................................................... 95
10.1.2
Registers..................................................................................................................................................... 95
10.1.2.1
ADC Control Register (ADCCR)....................................................................................................... 96
10.1.2.2
ADC Touch Panel Control Register (ADCTPCR).............................................................................. 96
10.1.2.3
ADC Battery check Control Register (ADCBACR)........................................................................... 97
10.1.2.4
ADC Sound Control Register (ADCSDCR)....................................................................................... 97
10.1.2.5
ADC Interrupt Status Register (ADCISR).......................................................................................... 97
10.1.2.6
ADC Tip Down Control Status Register (ADCTDCSR).................................................................... 98
10.1.2.7
ADC Direct Control Register (ADCDIRCR)..................................................................................... 98
10.1.2.8
ADC Direct Data Read Register (ADCDIRDATA)............................................................................ 98
10.1.2.9
ADC 1
Touch Panel Data register.................................................................................................... 99
10.1.2.10
ADC 2
ND
Touch Panel Data Register ................................................................................................. 99
10.1.2.11
ADC Main Battery Data Register (ADCMBDATA) ........................................................................ 100
10.1.2.12
ADC Backup Battery Data Register (ADCBBDATA)...................................................................... 100
10.1.2.13
ADC Sound Data Register (ADCSDATA0 – ADCSDATA7)........................................................... 100
10.2
GPIO................................................................................................................................................................ 102
10.2.1
External Signals....................................................................................................................................... 102
10.2.2
Registers................................................................................................................................................... 102
10.2.2.1
ADATA............................................................................................................................................. 103
10.2.2.2
ADIR................................................................................................................................................ 103
10.2.2.3
AMASK ........................................................................................................................................... 104
10.2.2.4
ASTAT.............................................................................................................................................. 104
10.2.2.5
AEDGE............................................................................................................................................ 104
10.2.2.6
ACLR............................................................................................................................................... 104
10.2.2.7
APOL ............................................................................................................................................... 104
10.2.2.8
GPIO PORT A Enable Register........................................................................................................ 104
10.2.2.9
BDATA............................................................................................................................................. 105
10.2.2.10
BDIR................................................................................................................................................ 105
10.2.2.11
BMASK............................................................................................................................................ 105
10.2.2.12
BSTAT.............................................................................................................................................. 105
10.2.2.13
BEDGE ............................................................................................................................................ 105
10.2.2.14
BCLK............................................................................................................................................... 105
10.2.2.15
BPOL................................................................................................................................................ 105
10.2.2.16
GPIO PORT B Enable Register........................................................................................................ 105
10.2.2.17
CDATA............................................................................................................................................. 105
10.2.2.18
CDIR................................................................................................................................................ 105
10.2.2.19
CMASK............................................................................................................................................ 106
10.2.2.20
CBSTAT........................................................................................................................................... 106
10.2.2.21
CEDGE ............................................................................................................................................ 106
10.2.2.22
CCLK............................................................................................................................................... 106
10.2.2.23
CPOL................................................................................................................................................ 106
10.2.2.24
GPIO PORT C Enable Register........................................................................................................ 106
相關(guān)PDF資料
PDF描述
HMS81C2012A CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver
HMS81C2012AK CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver
HMS81C2012ALQ CMOS Single-Chip 8-Bit Microcontroller with A/D Converter & VFD Driver
HMS81C2012AQ INDUCTOR*100UH*0.73AMP*0.672OHM*15%*SURFACE MOUNT
HMS81C2020A INDCTR, PWR, SMT 1.5UH, 15%, 6.9 A
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
HMS30C7210 制造商:未知廠家 制造商全稱:未知廠家 功能描述:ARM Based 32-Bit Microprocessor
HMS3224M3 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:SRAM MODULE 768KBit (32K x 24-Bit)
HMS3224M3-10 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:SRAM MODULE 768KBit (32K x 24-Bit)
HMS3224M3-12 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:SRAM MODULE 768KBit (32K x 24-Bit)
HMS3224M3-15 制造商:HANBIT 制造商全稱:Hanbit Electronics Co.,Ltd 功能描述:SRAM MODULE 768KBit (32K x 24-Bit)
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購

我的聯(lián)系方式

*
*
*