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| 型號： | HMS30C7202N |
| 廠商： | Electronic Theatre Controls, Inc. |
| 英文描述： | Highly-intergrated MPU |
| 中文描述： | 高intergrated微處理器 |
| 文件頁數(shù)： | 135/179頁 |
| 文件大小： | 2127K |
| 代理商： | HMS30C7202N |
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HMS30C7202N
2004 MagnaChip Semiconductor Ltd. All Rights Reserved. Version 1.1
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14
W
When TestReg[59] is HIGH, output is the same as CountCLK inversion.
When TestReg[59] is LOW, output is the same as CountReg[59]
When TestReg[55] is HIGH, output is the same as CountCLK inversion.
When TestReg[55] is LOW, output is the same as CountReg[55]
When TestReg[51] is HIGH, output is the same as CountCLK inversion.
When TestReg[51]] is LOW, output is the same as CountReg[51]
When TestReg[47] is HIGH, output is the same as CountCLK inversion.
When TestReg[47] is LOW, output is the same as CountReg[47]
When TestReg[43] is HIGH, output is the same as CountCLK inversion.
When TestReg[43] is LOW, output is the same as CountReg[43]
When TestReg[39] is HIGH, output is the same as CountCLK inversion.
When TestReg[39] is LOW, output is the same as CountReg[39]
When TestReg[35] is HIGH, output is the same as CountCLK inversion.
When TestReg[35] is LOW, output is the same as CountReg[35]
When TestReg[31] is HIGH, output is the same as CountCLK inversion.
When TestReg[31] is LOW, output is the same as CountReg[31]
When TestReg[27] is HIGH, output is the same as CountCLK inversion.
When TestReg[27] is LOW, output is the same as CountReg[27]
When TestReg[23] is HIGH, output is the same as CountCLK inversion.
When TestReg[23] is LOW, output is the same as CountReg[23]
When TestReg[19] is HIGH, output is the same as CountCLK inversion.
When TestReg[19] is LOW, output is the same as CountReg[19]
When TestReg[15] is HIGH, output is the same as CountCLK inversion.
When TestReg[15] is LOW, output is the same as CountReg[15]
When TestReg[11] is HIGH, output is the same as CountCLK inversion.
When TestReg[11] is LOW, output is the same as CountReg[11]
When TestReg[7] is HIGH, output is the same as CountCLK inversion.
When TestReg[7] is LOW, output is the same as CountReg[7]
When TestReg[3] is HIGH, output is the same as CountCLK inversion.
When TestReg[3] is LOW, output is the same as CountReg[3]
13
W
12
W
11
W
10
W
9
W
8
W
7
W
6
W
5
W
4
W
3
W
2
W
1
W
0
W
10.7.2.10
Timer Lower 32-bit Base Register of 64-bit Counter (T64LBASE)
0x8002.5094
17
16
31
T64LBASE [31:16]
15
14
T64LBASE [15:0]
30
29
28
27
26
25
24
23
22
21
20
19
18
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bits
31:0
Type
R/W
Function
Lower 32bit base value of 64bit Timer (Timer3)
10.7.2.11
Timer Upper 32-bit Base Register of 64-bit Counter (T64HBASE)
0x8002.5098
17
16
31
T64HBASE [31:16]
15
14
T64HBASE [15:0]
30
29
28
27
26
25
24
23
22
21
20
19
18
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bits
31:0
Type
R/W
Function
Upper 32bit base value of 64bit Timer (Timer3)
10.7.2.12
PWM Channel [0,1] Count Register (P[0,1]COUNT)
0x8002.50A0 / 0x8002.50C0
3
2
1
15
P[0,1]COUNT
14
13
12
11
10
9
8
7
6
5
4
0
Bits
15:0
Type
R
Function
PWM [0,1] Count Register
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