參數(shù)資料
型號： CDK8920A
廠商： Cirrus Logic, Inc.
英文描述： CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER
中文描述： 水晶藍的ISA即插即用，即插即用以太網(wǎng)控制器
文件頁數(shù)： 88/144頁
文件大?。?/td> 1229K
代理商： CDK8920A
5.2
Basic Receive Operation
Overview
When an incoming packet has passed through
the analog front end and Manchester decoder, it
goes through the following three-step receive
process:
1. Pre-Processing
2. Temporary Buffering
3. Transfer to Host
Figure 5.2 shows the steps in frame reception.
As shown in the figure, all receive frames go
through the same pre-processing and temporary
buffering phases, regardless of transfer method.
When a frame has been pre-processed and buff-
ered, it can be accessed by the host in either
Memory or I/O space. In addition, the CS8920A
can transfer receive frames to host memory via
host DMA. This section describes receive frame
pre-processing and Memory and I/O space re-
ceive operation. Sections 5.5 through 5.6
describe DMA operation.
5.2.1
Transfer
Terminology: Packet, Frame, and
The terms Packet, Frame, and Transfer are used
extensively in the following sections. They are
defined below for clarity.
Packet:
The term "packet" refers to the entire se-
rial string of bits transmitted over an Ethernet
network. This includes the preamble, Start-of-
Frame Delimiter (SFD), Destination Address
(DA), Source Address (SA), Length field, Data
field, pad bits (if necessary), and Frame Check
Sequence (FCS, also called CRC). Figure 3.6
shows the format of a packet.
Frame:
The term "frame" refers to the portion of
a packet from the DA to the FCS. This includes
the Destination Address (DA), Source Address
(SA), Length field, Data field, pad bits (if neces-
sary), and Frame Check Sequence (FCS, also
called CRC). Figure 3.6 shows the format of a
frame. The term "frame data" refers to all the
data from the DA to the FCS that is to be trans-
mitted, or that has been received.
Transfer:
The term "transfer" refers to moving
data across the ISA bus, to and from the
CS8920A. During receive operations, only frame
data are transferred from the CS8920A to the
host (the preamble and SFD are stripped off by
the CS8920A’s MAC engine). The FCS may or
may not be transferred, depending on the con-
figuration. All transfers to and from the
CS8920A are counted in bytes, but may be pad-
ded for word alignment.
Yes
No
Use
DMA
Frame Held
On Chip
Frame DMAed
to Host Memory
Host Reads
Frame from
Host Memory
Frame Pre-
Processed
Frame
Temporarily
Buffered
Packet Received
Preamble and
Start-of-Frame
Delimiter Removed
Host Reads
Frame from
CS8920A Memory
Figure 5.2. Frame Reception
CS8920A
88
DS238PP2
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