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參數(shù)資料
| 型號(hào)： | CDK8920A |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER |
| 中文描述： | 水晶藍(lán)的ISA即插即用，即插即用以太網(wǎng)控制器 |
| 文件頁(yè)數(shù)： | 20/144頁(yè) |
| 文件大?。?/td> | 1229K |
| 代理商： | CDK8920A |
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Reset Configuration Block
The first block in EEPROM, referred to as the
Reset Configuration Block, is used to automat-
ically program the CS8920A with an initial
configuration after a reset. It is a block of con-
tiguous 16-bit words starting at EEPROM
address 00h. The Reset Configuration Block can
be divided into three logical sections: a header,
one or more groups of configuration data words,
and a checksum value. All of the words in the
Reset Configuration Block are read sequentially
by the CS8920A after each reset, starting with
the header and ending with the checksum. Each
group of configuration data is used to program a
PacketPage register (or set of PacketPage regis-
ters in some cases) with an initial non-default
value.
Reset Configuration Block Header:
The header
(first word of the block located at EEPROM ad-
dress 00h) specifies the type of EEPROM used,
whether or not a Reset Configuration block is
present, if the CS8920A’s Plug and Play support
is enabled or disabled, and how many bytes of
data are stored in the Reset Configuration Block.
Determining the EEPROM Type:
The LSB of
the high byte of the header indicates the type of
EEPROM attached: sequential or non-sequential.
An LSB of 0 (XXXX-XXX0) indicates a se-
quential EEPROM. An LSB of 1 (XXXX-
XXX1) indicates a non-sequential EEPROM.
The CS8920A works equally well with either
type of EEPROM. The CS8920A will automat-
ically generate sequential addresses while
reading the Reset Configuration Block if a non-
sequential EEPROM is used.
Checking EEPROM for presence of Reset Con-
figuration Block:
The readout of either a binary
101X-XXX0 or 101X-XXX1 (X = do not care)
from the high byte of the header indicates the
presence of configuration data. Any other read-
Word Address
FIRST WORD in DATA BLOCK
00h
Value
Description
B112h
Configuration Block Header.
The high byte, B1h, indicates a ’C56 EEPROM (non-sequential) is attached
and Plug and Play is disabled. The Link Byte, 12h, indicates the number of
bytes of configuration data in this block.
FIRST GROUP of WORDS
01h
2158h
Group Header for first group of words.
Three words to be loaded, beginning at 0158h in PacketPage memory.
Individual address, bits[39-32], bits[47-40]
Individual address, bits[23-16], bits[31-24]
Individual address, bits[7-0], bits[15-8]
02h
03h
04h
SECOND GROUP of WORDS
05h
0100h
0302h
0504h
0360h
Group Header for second group of words.
One word to be loaded at 360h in PacketPage memory.
IO Base address = 300h
06h
THIRD GROUP of WORDS
07h
0003h
0330h
Group Header for third group of words.
One word to be loaded at 330h in PacketPage memory.
Set adapter’s activate bit (make active on reset w/o PnP).
08h
CHECKSUM Value
09h
0001
1B00h
The high byte, 1Bh, is the checksum value. The checksum includes word
addresses 00h through 08h. The hexadecimal sum of the bytes is E5h,
resulting in a 2’s complement of 1Bh. The low byte, 00h, provides a pad to
the word boundary.
Table 3.6. EEPROM Configuration Block Example
CS8920A
20
DS238PP2
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