參數(shù)資料
型號(hào)： CDK8920A
廠商： Cirrus Logic, Inc.
英文描述： CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER
中文描述： 水晶藍(lán)的ISA即插即用，即插即用以太網(wǎng)控制器
文件頁(yè)數(shù)： 18/144頁(yè)
文件大小： 1229K
代理商： CDK8920A
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EEPROM is not present and the CS8920A
comes out of reset with the default configuration
shown in Table 3.3.
A low-cost serial EEPROM can be used to store
configuration information that is automatically
loaded into the CS8920A after each reset (except
EEPROM reset). The use of an EEPROM is op-
tional and is not required for all applications
(e.g. motherboard designs). However, while op-
eration of the CS8920A is possible without the
use of an attached EEPROM, special design con-
siderations are required. Furthermore, some of
the CS8920A functions, such as Plug and Play
capabilities and wakeup frame recognition are
not possible without an attached EEPROM. Con-
tact Crystal’s CS8920A technical support for
more information on the use of the CS8920A
without an attached EEPROM.
The CS8920A operates with any of six standard
EEPROM’s shown in Table 3.4. To work in a
PNP system, the CS8920A requires at least a
128 word EPROM.
3.4
Plug & Play
Plug and Play is a standard mechanism, devel-
oped by Intel and Microsoft, that provides an
automatic configuration capability for ISA cards.
System resources such as interrupts, memory ad-
dresses, and IO ports are assigned to Plug and
Play compatible devices by the Plug and Play
configuration mechanism.
The CS8920A fully supports Plug and Play and
allows the complete configuration of the ISA in-
terface by the Plug and Play compatible
operating system software or BIOS. Refer to the
Plug and Play ISA Specification for detailed in-
formation about the innerworkings of Plug and
Play.
Plug and Play Configuration Process
The Plug and Play configuration process deter-
mines the resource requirements of the Plug and
Play devices in a system and assigns non-con-
flicting resources to these cards. The
configuration process goes through several
phases:
PacketPage
Address
0360h
0370h
Register
Contents
0000h
XXXX XXXX
0000 0000
XXXX XXXX
XXXX XX11
0000h
X000h
0000h
XXX0 0000h
XXX0 0000h
Register
Description
I/O Base Address*
Interrupt Number
0374h
DMA Channel
0026h
0028h
002Ah
0348h
0340h
DMA Start-of-Frame Offset
DMA Frame Count
DMA Byte Count
Memory Base Address
Boot PROM Base
Address
Boot PROM Address Mask
Register 3 - RxCFG
Register 5 - RxCTL
Register 7 - TxCFG
Register 9 - TxCMD
Register B - BufCFG
Register D - Advint CTL/ST
Reserved
Reserved
Register 13 - LineCTL
Register 15 - SelfCTL
Register 17 - BusCTL
Register 19 - TestCTL
Register ID - AutoNeg CTL
0343h
0102h
0104h
0106h
0108h
010Ah
010Ch
010Eh
0110h
0112h
0114h
0116h
0118h
011Ch
* I/O base address is unaffected by SW Suspend mode.
Table 3.3. Default Configuration
XXX0 0000h
0003h
0005h
0007h
0009h
000Bh
000Dh
Undefined
Undefined
0013h
0015h
0017h
0019h
001Dh
EEPROM Type
’C46 (non-sequential)
’CS46 (sequential)
’C56 (non-sequential)
’CS56 (sequential)
’C66 (non-sequential)
’CS66 (sequential)
Size (16-bit words)
64
64
128
128
256
256
Table 3.4. Supported EEPROM Types
CS8920A
18
DS238PP2
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