參數資料
型號： CDK8920A
廠商： Cirrus Logic, Inc.
英文描述： CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER
中文描述： 水晶藍的ISA即插即用，即插即用以太網控制器
文件頁數： 55/144頁
文件大小： 1229K
代理商： CDK8920A
Register 8: Transmitter Event (TxEvent, Read-only)
Address: PacketPage base + 0128h
F
E
D
C
B
A
9
8
7
6
5-0
16coll
Number-of-Tx-collisions
Jabber
Out-of-
window
TxOK
SQEerror
Loss-of-
CRS
001000
TxEvent gives the event status of the last packet transmitted.
BIT
NAME
DESCRIPTION
5-0
001000
These bits provide an internal address used by the CS8920A to identify this as the
Transmitter Event Register. When reading this register, these bits will be 001000, where
the LSB corresponds to Bit 0.
6
Loss-of-CRS
If the CS8920A is transmitting on the AUI and doesn’t see Carrier Sense (CRS) at the
end of the preamble, there is a Loss-of-Carrier error and this bit is set. If Loss-of-
CRSiE (Register 7, TxCFG, Bit 6) is set, there is an interrupt.
7
SQEerror
At the end of a transmission on the AUI, the CS8920A expects to see a collision within
64 bit times. If this does not happen, there is an SQE error and this bit is set. If
SQEerroriE (Register 7, TxCFG, Bit 7) is set, there is an interrupt.
8
TxOK
This bit is set if the last packet was completely transmitted (Jabber (Bit A), out-of-
window-collision (Bit 9), and 16Coll (Bit F) must all be clear). If TxOKiE (Register 7,
TxCFG, Bit 8) is set, there is an interrupt.
9
Out-of-
window
This bit is set if a collision occurs more than 512 bit times after the first bit of the
preamble. When this occurs, the CS8920A forces a bad CRC and terminates the
transmission. If Out-of-windowiE (Register 7, TxCFG, Bit 9) is set, there is an interrupt.
A
Jabber
If the last transmission is longer than 26 ms, the packet output is terminated by the
jabber logic and this bit is set. If JabberiE (Register 7, TxCFG, Bit A) is set, there is an
interrupt.
E-B
Number-of-
Tx-collisions
These bits give the number of transmit collisions that occurred on the last transmitted
packet. Bit B is the LSB. If AnycolliE (Register 7, TxCFG, Bit B) is set, there is an
interrupt when any collision occurs.
F
16coll
This bit is set when the CS8920A encounters 16 normal collisions while attempting to
transmit a particular packet. When this happens, the CS8920A stops further attempts to
send that packet. If 16colliE (Register 7, TxCFG, Bit F) is set, there is an interrupt.
This register’s initial state after reset is:
0000 0000
0000 1000
NOTES:
1. In any event register, like TxEvent, all bits are cleared upon readout. The host is responsible for
processing all event bits.
2. TxOK (Bit 8) and the Number-of-Tx-Collisions (Bits E-B) are used in normal packet transmission.
All other bits (6, 7, 9, A, and F) give the status of abnormal transmit operation.
CS8920A
DS238PP2
55
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