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參數(shù)資料
| 型號： | CDK8920A |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER |
| 中文描述： | 水晶藍(lán)的ISA即插即用，即插即用以太網(wǎng)控制器 |
| 文件頁數(shù)： | 109/144頁 |
| 文件大?。?/td> | 1229K |
| 代理商： | CDK8920A |
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5.8.3
Changing the Configuration
When the host configures these registers it does
not need to change them for subsequent packet
transmissions. If the host does choose to change
the TxCFG or BufCFG registers, it may do so at
any time. The effects of the change are noticed
immediately. That is, any changes in the Inter-
rupt Enable (iE) bits may affect the packet
currently being transmitted.
If the host chooses to change bits in the
LineCTL register after initialization, the Mod-
BackoffE bit and any receive related bit
(LoRxSquelch, SerRxON) may be changed at
any time. However, the AutoAUI/10BT and
AUIonly bits should not be changed while the
SerTxON bit is set. If any of these three bits are
to be changed, the host should first clear the
SerTxON bit (Register 13, LineCTL, Bit 7), and
then set it when the changes are complete.
5.8.4
Enabling CRC Generation and Padding
Whenever the host issues a Transmit Request
command, it must indicate whether or not the
Cyclic Redundancy Check (CRC) value should
be appended to the transmit frame, and whether
or not pad bits should be added (if needed). Ta-
ble 5.15 describes how to configure the
CS8920A for CRC generating and padding.
5.8.5
Individual Packet Transmission
Whenever the host has a packet to transmit, it
must issue a Transmit Request to the CS8920A
consisting of the following three operations in
the exact order shown:
1. The host must write a Transmit Command to
the TxCMD register (PacketPage base +
0144h or I/O base +0004h). The contents of
Register 7, TxCFG
Bit
6
Bit Name
Loss-of-
CRSiE
Operation
When set, there is an interrupt
whenever the CS8920A fails to detect
Carrier Sense after transmitting the
preamble (applies to the AUI only).
SQEerroriE When set, there is an interrupt
whenever there is an SQE error.
TxOKiE
When set, there is an interrupt
whenever a frame is transmitted
successfully.
Out-of-
windowiE
whenever a late collision is detected.
JabberiE
When set, there is an interrupt
whenever there is a jabber condition.
AnycolliE
When set, there is an interrupt
whenever there is a collision.
16colliE
When set, there is an interrupt
whenever the CS8920A attempts to
transmit a single frame 16 times.
7
8
9
When set, there is an interrupt
A
B
F
Table 5.13. Transmitting Interrupt Configuration
Register B, BufCFG
Bit
8
Bit Name
Rdy4TxiE
Operation
When set, there is an interrupt
whenever buffer space becomes
available for a transmit frame (used
with a Transmit Request).
When set, there is an interrupt when
the CS8920A runs out of data after
transmit has started.
When set, there is an interrupt
whenever the TxCol counter overflows.
9
TxUnder
RuniE
C
TxCol
OvfloiE
Table 5.14. Tranmit Interrupt Configuration
Register 9, TxCMD
Operation
TxPad
Dis
(Bit D)
0
Inhibit
CRC
(Bit C)
0
Pad to 64 bytes if necessary (including
CRC).
Send a runt frame if specified length
less than 60 bytes.
Pad to 60 bytes if necessary (without
CRC).
Send runt if specified length less than
64. The CS8920A will not transmit a
frame that is less than 3 bytes.
0
1
1
0
1
1
Table 5.15. CRC and Padding Configuration
CS8920A
DS238PP2
109
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