參數(shù)資料
型號： CDK8920A
廠商： Cirrus Logic, Inc.
英文描述： CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER
中文描述： 水晶藍(lán)的ISA即插即用，即插即用以太網(wǎng)控制器
文件頁數(shù)： 54/144頁
文件大?。?/td> 1229K
代理商： CDK8920A
Register 7: Transmit Configuration (TxCFG, Read/Write)
Address: PacketPage base + 0106h
F
E
D
C
B
A
9
8
7
6
5-0
16colliE
AnycolliE
JabberiE
Out-of-
windowiE
TxOKiE
SQE
erroriE
Loss-of-
CRSiE
000111
Each bit in TxCFG is an interrupt enable. When set, the interrupt is enabled as described below. When clear,
there is no interrupt.
BIT
NAME
DESCRIPTION
5-0
000111
These bits provide an internal address used by the CS8920A to identify this as the
Transmit Configuration Register.
6
Loss-of-CRSiE If the CS8920A starts transmitting on the AUI and does not see the Carrier Sense
signal at the end of the preamble; an interrupt is generated if this bit is set. Carrier
Sense activity is reported by the CRS bit (Register 14, LineST, Bit E).
7
SQEerroriE
(AUI Only)
At the end of a transmission, the CS8920A expects an assertion of the SQE_test
signal on the AUI port within 64 bit times. If this does not happen, an SQE error occurs.
8
TxOKiE
When set, an interrupt is generated if a packet is completely transmitted.
9
Out-of-
windowiE
When set, an interrupt is generated if a late collision occurs (a late collision is a
collision which occurs after the first 512 bit times). When this occurs, the CS8920A
forces a bad CRC and terminates the transmission.
A
JabberiE
When set, an interrupt is generated if a transmission is longer than approximately
26 ms.
B
AnycolliE
When set, if one or more collisions occur during the transmission of a packet, an
interrupt occurs at the end of the transmission.
F
16colliE
When the CS8920A encounters 16 normal collisions while attempting to transmit a
particular packet, the CS8920A stops attempting to transmit that packet. When this bit
is set, there is an interrupt upon detecting the 16th collision.
After reset, if no EEPROM is found by the CS8920A, the register has the following initial state. If an EEPROM is
found, the register’s initial value may be set by the EEPROM. See Section 3.3.
0000 0000
0000 0111
NOTE: Bit 8 (TxOKiE) and Bit B (AnycolliE) are interrupts for normal transmit operation. Bits 6, 7, 9, A, and F
are interrupts for abnormal transmit operation.
CS8920A
54
DS238PP2
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