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參數(shù)資料
| 型號(hào)： | CDK8920A |
| 廠商： | Cirrus Logic, Inc. |
| 英文描述： | CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER |
| 中文描述： | 水晶藍(lán)的ISA即插即用，即插即用以太網(wǎng)控制器 |
| 文件頁數(shù)： | 114/144頁 |
| 文件大?。?/td> | 1229K |
| 代理商： | CDK8920A |
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frame to see if there is sufficient on-chip buffer
space. If there is, the CS8920A sets the
Rdy4TxNOW bit. If not, and the Rdy4TxiE bit
is set, the CS8920A waits for buffer space to
free up and then sets the Rdy4Tx bit. If
Rdy4TxiE is not set, the CS8920A sets the
Rdy4TxNOW bit when space becomes available.
Even though transmit buffer space may be avail-
able, the CS8920A does not commit buffer space
to a transmit frame until all of the following are
true:
1. The host must issues a Transmit Request;
2. The Transmit Request must be successful; and,
3. Either the host reads that the Rdy4TxNOW bit
(Register 18, BusST, Bit 8) is set, or the host
reads that the Rdy4Tx bit (Register C,
BufEvent, bit 8) is set.
If the CS8920A commits buffer space to a par-
ticular transmit frame, it will not allow
subsequent frames to be written to that buffer
space as long as the transmit frame is committed.
After buffer space is committed, the frame is
subsequently transmitted unless any of the fol-
lowing occur:
1. The host completely writes the frame data, but
transmission failed on the Ethernet line.
There are three such failures, and these are in-
dicated by three transmit error bits in the
TxEvent register (Register 8): 16coll, Jabber,
or Out-of-Window.
Or:
2. The host aborts the transmission by setting the
Force (Register 9, TxCMD, bit 8) bit. In this
case, the committed transmit frame, as well as
any yet-to-be-transmitted frames queued in
the on-chip memory, are cleared and not
transmitted. The host should make TxLength
= 0 when using the Force bit.
Or:
3. There is a transmit under-run, and the TxUn-
derrun bit (Register C, BufEvent, Bit 9) is set.
Successful transmission is indicated when the
TxOK bit (Register 8, TxEvent, Bit 8) is set.
Register 9, TxCMD
TxPadDis
(Bit D)
0
Host specified transmit length at 0146h (in bytes)
60 >= TxLength =< 1514 1514 > TxLength < 1518
InhibitCRC
(Bit C)
0
3 < TxLength < 60
TxLength > 1518
Pad to 60
and add CRC
Pad to 60 and
send without CRC
Send without pads,
and add CRC
Send without pads
and without CRC
Send frame and add
CRC [Normal Mode]
Send frame
without CRC
Send frame
and add CRC
Send frame
without CRC
Will not send
Will not send
0
1
Send frame
without CRC
Will not send
Will not send
1
0
Will not send
1
1
Send frame
without CRC
Will not send
NOTES: . If the TxPadDis bit is clear and InhibitCRC is set and the CS8920A is commanded to send a frame of
length less than 60 bytes, the CS8920A pads.
2. The CS8920A will not send a frame with TxLength less than 3 bytes.
Table 5.17. Transmit Frame Length
CS8920A
114
DS238PP2
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