參數(shù)資料
型號(hào): CDK8920A
廠商: Cirrus Logic, Inc.
英文描述: CRYSTAL LAN ISA PLUG-AND-PLAY ETHERNET CONTROLLER
中文描述: 水晶藍(lán)的ISA即插即用,即插即用以太網(wǎng)控制器
文件頁(yè)數(shù): 32/144頁(yè)
文件大?。?/td> 1229K
代理商: CDK8920A
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Onecoll bit is set, the MAC discards the packet
without attempting any re-transmission.
Late Collisions:
If a collision is detected after
the first 512 bits have been transmitted, the
MAC immediately terminates transmission,
transmits the jam sequence, discards the packet,
and sets the Out-of-window bit (Register 8,
TxEvent, Bit 9). The CS8920A does not initiate
backoff or attempt to re-transmit the frame. For
additional information about Late Collisions, see
Out-of-Window Error
in this section.
Backoff:
After the MAC has completed transmit-
ting the jam sequence, it must wait, or "Back
off", before attempting to transmit again. The
amount of time it must wait is determined by
one of two Backoff algorithms: the Standard
Backoff algorithm (ISO/IEC 4.2.3.2.5) or the
Modified Backoff algorithm. The host selects
which algorithm through the ModBackoffE bit
(Register 13, LineCTL, Bit B).
Standard Backoff:
The Standard Backoff algo-
rithm, also called the "Truncated Binary
Exponential Backoff", is described by the equa-
tion:
0
r
2
k
where r (a random integer) is the number of slot
times the MAC must wait (1 slot time = 512 bit
times), and k is the smaller of n or 10, where n
is the number of re-transmission attempts.
Modified Backoff: The Modified Backoff is de-
scribed by the equation:
0
r
2
k
where r (a random integer) is the number of slot
times the MAC must wait, and k is 3 for n <3
and k is the smaller of n or 10 for n>3, where n
is the number of re-transmission attempts.
The advantage of the Modified Backoff algo-
rithm over the Standard Backoff algorithm is that
it reduces the possibility of multiple collisions
on the first three re-tries. The disadvantage is
that it extends the maximum time needed to gain
access to the network for the first three re-tries.
The host may choose to disable the Backoff al-
gorithm altogether by setting the DisableBackoff
bit (Register 19, TestCTL, Bit B). When dis-
abled, the CS8920A only waits the 9.6
μ
s IPG
time before starting transmission.
Encoder
Carrier
Detector
Decoder
& PLL
RX
MUX
TX
MUX
RXSQL
AUISQL
AUIRX
RX
TX
AUITX
AUICol
Clock
Carrier Sense
RX CLK
RX NRZ
TXCLK
TX NRZ
TEN
Port Select
Collision
MAC
ENDEC
10BASE-T
Transceiver
AUI
Figure 3.9. ENDEC
CS8920A
32
DS238PP2
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