
I OUTLINE: LIST OF PINS
B-I-3-6
EPSON
S1C33T01 FUNCTION PART
Table 3.3
List of Pins for Internal Peripheral Circuits (continue)
Pin name
I/O
Pull-up
Function
P70
SCL0
I/O
–
P70:
I/O port when CFP70(D0/0x4030A) = "0" (default)
SCL0:
When the single-master I
2C-bus Ch. 0 clock I/O/CFP70 (D0/0x4030A) = "1"
P71
SDA0
I/O
–
P71:
I/O port when CFP70(D0/0x4030A) = "0" (default)
SDA0:
When the single-master I
2C-bus Ch. 0 clock I/O/CFP70(D0/0x4030A) = "1"
P72
SCL1
I/O
–
P72:
I/O port when CFP71(D1/0x4030A) = "0" (default)
SCL1:
When the single-master I
2C-bus Ch. 1 clock I/O/CFP71(D1/0x4030A) = "1"
P73
SDA1
I/O
–
P73:
I/O port when CFP70(D1/0x4030A) = "0" (default)
SDA1:
When the single-master I
2C-bus Ch. 1 clock I/O/CFP71(D1/0x4030A) = "1"
P74
I/O
–
I/O port
P75
I/O
–
I/O port
P76
I/O
–
I/O port
P77
I/O
–
I/O port
P80
EXCL6
I/O
–
P80:
I/O port when CFP80(D0/0x4030D) = "0" (default)
EXCL6:
When the 16-bit timer 6 event counter input/CFP80(D0/0x4030A) = "1"
P81
EXCL7
I/O
–
P81:
I/O port when CFP81(D1/0x4030D) = "0" (default)
EXCL7:
When the 16-bit timer 7 event counter input/CFP81(D1/0x4030A) = "1"
P82
EXCL8
I/O
–
P82:
I/O port when CFP82(D2/0x4030D) = "0" (default)
EXCL8:
When the 16-bit timer 8 event counter input/CFP82(D2/0x4030A) = "1"
P83
EXCL9
I/O
–
P83:
I/O port when CFP83(D3/0x4030D) = "0" (default)
EXCL9:
When the 16-bit timer 9 event counter input/CFP83(D3/0x4030A) = "1"
P84
TM6
I/O
–
P84:
I/O port when CFP84(D4/0x4030D) = "0" (default)
TM6:
16-bit timer 6 output when CFP84(D4/0x4030A) = "1"
P85
TM7
I/O
–
P80:
I/O port when CFP85(D5/0x4030A) = "0" (default)
TM7:
16-bit timer 7 output when CFP85(D5/0x4030A) = "1"
P86
TM8
I/O
–
P80:
I/O port when CFP86(D6/0x4030A) = "0" (default)
TM8:
16-bit timer 8 output when CFP86(D6/0x4030A) = "1"
P87
TM9
I/O
–
P80:
I/O port when CFP87(D7/0x4030A) = "0" (default)
TM9:
16-bit timer 9 output when CFP87(D0/0x4030A) = "1"
Table 3.4
List of Pins for Clock Generator and Oscillation Circuits
Pin name
I/O
Pull-up
Function
OSC1
I
–
Low-speed (OSC1) oscillation input (32 kHz crystal oscillator or external clock input)
OSC2
O
–
Low-speed (OSC1) oscillation output
OSC3
I
–
High-speed (OSC3) oscillation input (crystal/ceramic oscillator or external clock input)
OSC4
O
–
High-speed (OSC3) oscillation output
PLLS[1:0]
I
–
PLL set-up pins
PLLS1
PLLS0
fin (fOSC3)
fout (fPSCIN)
1
10–30MHz
20–60MHz
1
10–25MHz
20–50MHz
2
0
1
10–15MHz
40–60MHz
1
10–12.5MHz
40–50MHz
2
0
PLL is not used
L
1: ROM-less model with 3.3 V ± 0.3 V operating voltage
2: ROM built-in model, or 3.0 V ± 0.3 V operating voltage
PLLC
–
Capacitor connecting pin for PLL
Table 3.5
List of Other Pins
Pin name
I/O
Pull-up/down
Function
ICEMD
IWith
pull-down
High-impedance control input pin
When this pin is set to High, all the outputpins go into high-impedance state. This makes itpossible
to disable the S1C33 chip on the board.
DSIO
I/O
With pull-up
Serial I/O pin for debugging
This pin is used to communicate with the debugging tool S5U1C33000H.
#X2SPD
I
–
Clock doubling mode set-up pin
1: CPU clock = bus clock x 1, 0: CPU clock = bus clock x 2
#NMI
I
With pull-up
NMI request input pin
#RESET
I
With pull-up
Initial reset input pin
Note: "#" in the pin names indicates that the signal is low active.