
III PERIPHERAL BLOCK: 8-BIT PROGRAMMABLE TIMERS
S1C33T01 FUNCTION PART
EPSON
B-III-3-17
The interrupt factor flag can be reset only by writing to it in the software. Note that if the PSR is set again to accept
interrupts generated (or if the reti instruction is executed) without resetting the interrupt factor flag, the same
interrupt occurs again. Note also that the value to be written to reset the flag is "1" when the reset-only method
(RSTONLY = "1") is used, and "0" when the read/write method (RSTONLY = "0") is used.
At initial reset, the content of F8TUx becomes indeterminate, so be sure to reset it in the software.
R8TU0: Timer 0 IDMA request (D2) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA request register (0x40292)
R8TU1: Timer 1 IDMA request (D3) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA request register (0x40292)
R8TU2: Timer 2 IDMA request (D4) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA request register (0x40292)
R8TU3: Timer 3 IDMA request (D5) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA request register (0x40292)
R8TU4: Timer 4 IDMA request (D0) / 8-bit timer 4-5, serial I/F Ch.2/3 IDMA request register (0x4029B)
R8TU5: Timer 5 IDMA request (D1) / 8-bit timer 4-5, serial I/F Ch.2/3 IDMA request register (0x4029B)
Specifies whether IDMA is to be invoked at the occurrence of an interrupt factor.
When using the set-only method (default)
Write "1": IDMA request
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA request
Write "0": Interrupt request
Read: Valid
R8TUx is the IDMA request bit for each timer. If this bit is set to "1", IDMA can be invoked when an interrupt
factor occurs, and thus programmed data transfers are performed. If the bit is set to "0", normal interrupt processing
is performed and IDMA is not invoked.
For details on IDMA, refer to "IDMA (Intelligent DMA)".
At initial reset, R8TUx is set to "0" (interrupt request).
DE8TU0: Timer 0 IDMA enable (D2) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU1: Timer 1 IDMA enable (D3) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU2: Timer 2 IDMA enable (D4) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU3: Timer 3 IDMA enable (D5) / 16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA enable register (0x40296)
DE8TU4: Timer 4 IDMA enable (D0) / 8-bit timer 4-5, serial I/F Ch.2/3 IDMA enable register (0x4029C)
DE8TU5: Timer 5 IDMA enable (D1) / 8-bit timer 4-5, serial I/F Ch.2/3 IDMA enable register (0x4029C)
Enables IDMA transfer by means of an interrupt factor.
When using the set-only method (default)
Write "1": IDMA enabled
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA enabled
Write "0": IDMA disabled
Read: Valid
If DE8TUx is set to "1", the IDMA request by the interrupt factor is enabled. If the register bit is set to "0", the
IDMA request is disabled.
After an initial reset, DE8TUx is set to "0" (IDMA disabled).