
III PERIPHERAL BLOCK: 16-BIT PROGRAMMABLE TIMERS
B-III-4-32
EPSON
S1C33T01 FUNCTION PART
If the next interrupt is to be accepted after an interrupt has occurred, it is necessary that the interrupt factor flag be
reset, and that the PSR be set again (by setting the IE bit to "1" after setting the IL to a value lower than the level
indicated by the interrupt priority register, or by executing the reti instruction).
The interrupt factor flag can be reset only by writing to it in the software. Note that if the PSR is set again to accept
interrupts generated (or if the reti instruction is executed) without resetting the interrupt factor flag, the same
interrupt occurs again. Note also that the value to be written to reset the flag is "1" when the reset-only method
(RSTONLY = "1") is used, and "0" when the read/write method (RSTONLY = "0") is used.
At initial reset, all these flags become indeterminate, so be sure to reset them in the software.
R16TU0, R16TC0: Timer 0 IDMA request (D6, D7) /
Port input 0–3, HSDMA, 16-bit timer 0 IDMA request register (0x40290)
R16TU1, R16TC1: Timer 1 IDMA request (D0, D1) / 16-bit timer 1–4 IDMA request register (0x40291)
R16TU2, R16TC2: Timer 2 IDMA request (D2, D3) / 16-bit timer 1–4 IDMA request register (0x40291)
R16TU3, R16TC3: Timer 3 IDMA request (D4, D5) / 16-bit timer 1–4 IDMA request register (0x40291)
R16TU4, R16TC4: Timer 4 IDMA request (D6, D7) / 16-bit timer 1–4 IDMA request register (0x40291)
R16TU5, R16TC5: Timer 5 IDMA request (D0, D1) /
16-bit timer 5, 8-bit timer, serial I/F Ch.0 IDMA request register (0x40292)
R16TU6, R16TC6: Timer 6 IDMA request (D0, D1) / 16-bit timer 6–9 IDMA request register (0x402AD)
R16TU7, R16TC7: Timer 7 IDMA request (D2, D3) / 16-bit timer 6–9 IDMA request register (0x402AD)
R16TU8, R16TC8: Timer 8 IDMA request (D4, D5) / 16-bit timer 6–9 IDMA request register (0x402AD)
R16TU9, R16TC9: Timer 9 IDMA request (D6, D7) / 16-bit timer 6–9 IDMA request register (0x402AD)
Specifies whether to invoke IDMA when an interrupt factor occurs.
When using the set-only method (default)
Write "1": IDMA request
Write "0": Not changed
Read: Valid
When using the read/write method
Write "1": IDMA request
Write "0": Interrupt request
Read: Valid
R16TUx and R16TCx are IDMA request bits corresponding to the comparison B and comparison A interrupt
factors, respectively. When the bit is set to "1", IDMA is invoked when the interrupt factor occurs, thereby
performing programmed data transfers. When the register is set to "0", normal interrupt processing is performed and
IDMA is not invoked. For details on IDMA, refer to "IDMA (Intelligent DMA)".
At initial reset, these bits are set to "0" (interrupt request).