
II CORE BLOCK: ITC (Interrupt Controller)
B-II-5-24
EPSON
S1C33T01 FUNCTION PART
IDMAONLY: IDMA request register set method selection
(D1) / Flag set/reset method select register (0x4029F)
Select the method for setting the IDMA request registers.
Write "1": Set-only method
Write "0": Read/write method
Read: Valid
With the set-only method, IDMA request bits are set by writing "1".
The IDMA request bits for which "0" has been written can neither be set nor reset. Therefore, this method ensures
that only a specific IDMA request bit is set. However, when using read-modify-write instructions (e.g., bset, bclr, or
bnot), note that an IDMA request bit that has been set to "1" is not reset by writing.
The read/write method is selected by writing "0" to IDMAONLY. When this method is selected, IDMA request bits
can be read and written as for other registers. Therefore, the IDMA request bit is reset by writing "0" and set by
writing "1". In this case all IDMA request bits for which "0" has been written are reset. Even in a read-modify-write
operation, an IDMA request bit can be reset by the hardware between the read and the write, so be careful when
using this method.
After an initial reset, IDMAONLY is set to "1" (set-only method).
DENONLY: IDMA enable register set method selection
(D2) / Flag set/reset method select register (0x4029F)
Select the method for setting the IDMA enable registers.
Write "1": Set-only method
Write "0": Read/write method
Read: Valid
With the set-only method, IDMA enable bits are set by writing "1".
The IDMA enable bits for which "0" has been written can neither be set nor reset. Therefore, this method ensures
that only a specific IDMA enable bit is set. However, when using read-modify-write instructions (e.g., bset, bclr, or
bnot), note that an IDMA enable bit that has been set to "1" is not reset by writing.
The read/write method is selected by writing "0" to DENONLY. When this method is selected, IDMA enable bits
can be read and written as for other registers. Therefore, the IDMA enable bit is reset by writing "0" and set by
writing "1". In this case all IDMA enable bits for which "0" has been written are reset. Even in a read-modify-write
operation, an interrupt enable bit can be reset by the hardware between the read and the write, so be careful when
using this method.
After an initial reset, DENONLY is set to "1" (set-only method).
TBRP7–TBRP0: TTBR register write protection ([D[7:0]) / TTBR write-protect register (0x4812D)
Remove write protection for the TTBR register.
Write 0x59: Write protection is removed
Write not the above: No operation (write protected)
Read: Valid
Before writing to the TTBR register, set TBRP to "0x59" to remove the write protection. Then when data is written
to the most significant byte (0x48137) of the TTBR, the register once again becomes write-protected.
After an initial reset, TBRP is set to "0x0" (write protected).