
III PERIPHERAL BLOCK: INPUT/OUTPUT PORTS
S1C33T01 FUNCTION PART
EPSON
B-III-10-11
Even in the input mode, data can be written to the port data register.
When reading data
Read "1": High level
Read "0": Low level
The voltage level on the port pin is read out regardless of whether an I/O port is set for input or output mode.If the pin
voltage is high (VDD, VDDE level), "1" is read out as input data; if the pin voltage is low (VSS level), "0" is read out as
input data.
At cold start, all data bits are set to "0". At hot start, they retain their state from prior to the initial reset.
IOC07–IOC00: P0[7:0] port I/O control (D[7:0]) / P0 port I/O control register (0x402D2)
IOC16–IOC10: P1[6:0] port I/O control (D[6:0]) / P1 port I/O control register (0x402D6)
IOC27–IOC20: P2[7:0] port I/O control (D[7:0]) / P2 port I/O control register (0x402DA)
IOC35–IOC30: P3[5:0] port I/O control (D[5:0]) / P3 port I/O control register (0x402DE)
IOC47–IOC40: P4[7:0] port I/O control (D[7:0]) / P4 port I/O control register (0x40302)
IOC57–IOC50: P5[7:0] port I/O control (D[7:0]) / P5 port I/O control register (0x40305)
IOC67–IOC60: P6[7:0] port I/O control (D[7:0]) / P6 port I/O control register (0x40308)
IOC77–IOC70: P7[7:0] port I/O control (D[7:0]) / P7 port I/O control register (0x4030C)
IOC87–IOC80: P8[7:0] port I/O control (D[7:0]) / P8 port I/O control register (0x4030F)
Directs an I/O port for input or output.
Write "1": Output mode
Write "0": Input mode
Read: Valid
This I/O control register corresponds bit-for-bit to each I/O port. When an IOC bit is set to "1", the corresponding I/O
port is directed for output; if it is set to "0", the I/O port is directed for input.
At cold start, all IOC bits are set to "0" (input). At hot start, IOC retains its state from prior to the initial reset.
If pins P10–P13, P15–P16, P30 and P34 are set for use with peripheral circuits, their pin functions vary depending
on the input/output direction control by the IOC1x register.
CFEX0: P12, P14 function extension (D0) / Port function extension register (0x402DF)
CFEX1: P10, P11, P13 function extension (D1) / Port function extension register (0x402DF)
CFEX2: P21 function extension (D2) / Port function extension register (0x402DF)
CFEX3: P31 function extension (D3) / Port function extension register (0x402DF)
CFEX4: P04 function extension (D4) / Port function extension register (0x402DF)
CFEX5: P05 function extension (D5) / Port function extension register (0x402DF)
CFEX6: P06 function extension (D6) / Port function extension register (0x402DF)
CFEX7: P07 function extension (D7) / Port function extension register (0x402DF)
Sets whether the function of an I/O-port pin is to be extended.
Write "1": Function-extended pin
Write "0": I/O-port/peripheral-circuit pin
Read: Valid
When CFEXx is set to "1", the corresponding pin is set to the extended function input/output pin. When CFEXx =
"0", the corresponding CFP bit becomes effective.
At cold start, CFEX0 and CFEX1 are set to "1" (function-extended pin) and other bits are set to "0" (I/O-
port/peripheral-circuit pin). At hot start, CFEX retains its state from prior to the initial reset.