
TABLE OF CONTENTS
EPSON
vii
III-10 INPUT/OUTPUT PORTS...............................................................................B-III-10-1
Input Ports (K Ports).......................................................................................................................................B-III-10-1
Structure of Input Port.....................................................................................................................B-III-10-1
Input-Port Pins ...................................................................................................................................B-III-10-1
Notes on Use......................................................................................................................................B-III-10-2
I/O Memory of Input Ports .............................................................................................................B-III-10-3
I/O Ports (P Ports)...........................................................................................................................................B-III-10-4
Structure of I/O Port.........................................................................................................................B-III-10-4
I/O Port Pins .......................................................................................................................................B-III-10-4
I/O Control Register and I/O Modes..........................................................................................B-III-10-6
I/O Memory of I/O Ports .................................................................................................................B-III-10-7
Input Interrupt ................................................................................................................................................B-III-10-12
Port Input Interrupt ........................................................................................................................B-III-10-12
Key Input Interrupt.........................................................................................................................B-III-10-14
Control Registers of the Interrupt Controller........................................................................B-III-10-16
I/O Memory for Input Interrupts ................................................................................................B-III-10-19
Programming Notes.....................................................................................................................................B-III-10-27
IV
ANALOG BLOCK
IV-1 INTRODUCTION ............................................................................................. B-IV-1-1
IV-2 A/D CONVERTER ........................................................................................... B-IV-2-1
Features and Structure of A/D Converter ................................................................................................B-IV-2-1
I/O Pins of A/D Converter ..............................................................................................................................B-IV-2-2
Setting A/D Converter .....................................................................................................................................B-IV-2-3
Control and Operation of A/D Conversion...............................................................................................B-IV-2-5
A/D Converter Interrupt and DMA...............................................................................................................B-IV-2-7
I/O Memory of A/D Converter.......................................................................................................................B-IV-2-9
Programming Notes.......................................................................................................................................B-IV-2-15
V
DMA BLOCK
V-1 INTRODUCTION ............................................................................................... B-V-1-1
V-2 HSDMA (HIGH-SPEED DMA) ............................................................................ B-V-2-1
Functional Outline of HSDMA........................................................................................................................B-V-2-1
I/O Pins of HSDMA............................................................................................................................................B-V-2-2
Programming Control Information ................................................................................................................B-V-2-3
Setting the Registers in Dual-Address Mode............................................................................B-V-2-3
Setting the Registers in Single-Address Mode ........................................................................B-V-2-6
Enabling/Disabling DMA Transfer.................................................................................................................B-V-2-7
Trigger Factor.......................................................................................................................................................B-V-2-8
Operation of HSDMA.........................................................................................................................................B-V-2-9
Operation in Dual-Address Mode ..................................................................................................B-V-2-9
Operation in Single-Address Mode............................................................................................B-V-2-12
Timing Chart........................................................................................................................................B-V-2-13
Interrupt Function of HSDMA......................................................................................................................B-V-2-15