- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄98071 > S5933Q/7C (APPLIEDMICRO INC) PCI BUS CONTROLLER, PQFP160 PDF資料下載
參數(shù)資料
| 型號(hào)： | S5933Q/7C |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁數(shù)： | 84/327頁 |
| 文件大?。?/td> | 1976K |
| 代理商： | S5933Q/7C |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁當(dāng)前第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁第149頁第150頁第151頁第152頁第153頁第154頁第155頁第156頁第157頁第158頁第159頁第160頁第161頁第162頁第163頁第164頁第165頁第166頁第167頁第168頁第169頁第170頁第171頁第172頁第173頁第174頁第175頁第176頁第177頁第178頁第179頁第180頁第181頁第182頁第183頁第184頁第185頁第186頁第187頁第188頁第189頁第190頁第191頁第192頁第193頁第194頁第195頁第196頁第197頁第198頁第199頁第200頁第201頁第202頁第203頁第204頁第205頁第206頁第207頁第208頁第209頁第210頁第211頁第212頁第213頁第214頁第215頁第216頁第217頁第218頁第219頁第220頁第221頁第222頁第223頁第224頁第225頁第226頁第227頁第228頁第229頁第230頁第231頁第232頁第233頁第234頁第235頁第236頁第237頁第238頁第239頁第240頁第241頁第242頁第243頁第244頁第245頁第246頁第247頁第248頁第249頁第250頁第251頁第252頁第253頁第254頁第255頁第256頁第257頁第258頁第259頁第260頁第261頁第262頁第263頁第264頁第265頁第266頁第267頁第268頁第269頁第270頁第271頁第272頁第273頁第274頁第275頁第276頁第277頁第278頁第279頁第280頁第281頁第282頁第283頁第284頁第285頁第286頁第287頁第288頁第289頁第290頁第291頁第292頁第293頁第294頁第295頁第296頁第297頁第298頁第299頁第300頁第301頁第302頁第303頁第304頁第305頁第306頁第307頁第308頁第309頁第310頁第311頁第312頁第313頁第314頁第315頁第316頁第317頁第318頁第319頁第320頁第321頁第322頁第323頁第324頁第325頁第326頁第327頁
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
12-5
PCI CONTROLLER
S5933
DEVICE SPECIFICATION
For Pass-Thru writes, the S5933 responds immedi-
ately (asserting TRDY#) and transfers the data from
the PCI bus into the Pass-Thru Data Register
(APTD). The S5933 then indicates to the Add-On in-
terface that a Pass-Thru write is taking place and
waits for Add-On logic to read the APTD register and
complete the transfer (assert PTRDY#). Once the
S5933 has captured the data from the PCI bus, the
transfer is finished from the PCI bus perspective, and
the PCI bus becomes available for other transfers.
For Pass-Thru reads, the S5933 indicates to the Add-
On interface that a Pass-Thru read is taking place
and waits for Add-On logic to write the Pass-Thru
Data Register and complete the transfer (assert
PTRDY#). The S5933 completes the cycle when data
is written into the data register. If the Add-On cannot
complete the write quickly enough, the S5933 re-
quests a retry from the initiator. See Section 12.2.1.3
for target-requested disconnect information.
12.2.1.2 PCI Pass-Thru Burst Accesses
For PCI Pass-Thru burst accesses, the S5933 cap-
tures the PCI address and determines if it falls into
one of the defined Pass-Thru regions. Accesses that
fall into a Pass-Thru region are accepted by asserting
DEVSEL#. The S5933 monitors FRAME# and IRDY#
on the PCI bus to identify burst accesses. If the PCI
initiator is performing a burst access, the Pass-Thru
status indicators notify Add-On logic.
For Pass-Thru burst writes, the S5933 responds im-
mediately (asserting TRDY#). The S5933 transfers
the first data phase of the burst into the Pass-Thru
Data Register (APTD), and stores the PCI address in
the Pass-Thru Address Register (APTA). The Add-
On interface completes the transfer and asserts
PTRDY#. Every time PTRDY# is asserted by the
Add-On, the S5933 begins the next data phase. The
next data phase is latched into the data register. For
burst accesses, APTA is automatically incremented
by the S5933 for each data phase.
For Pass-Thru burst reads, the S5933 claims the PCI
cycle (asserting DEVSEL#). The request for data is
passed on to Add-On logic and the PCI address is
stored in the APTA register. The Add-On interface
completes the transfer and asserts PTRDY#. The
S5933 then drives the requested data on the PCI bus
and asserts TRDY# to begin the next data phase.
The APTA register is automatically incremented by
the S5933 for each data phase.
12.2.1.3 PCI Retry Conditions
In some applications, Add-On logic may not be able
to respond to Pass-Thru accesses quickly. In this
situation, the S5933 disconnects from the PCI bus,
signaling a retry. This indicates that the initiator
should try the access again at a later time. This al-
lows other PCI cycles to be run while the logic on the
slow target completes the Pass-Thru access. Ideally,
when the initiator retries the access, the target has
completed the access and can respond to the initia-
tor.
With many devices, particularly memories, the first
access takes longer than subsequent accesses (as-
suming they are sequential and not random). For this
reason, the PCI specification allows 16 clocks to re-
spond to the first data phase of a PCI cycle and 8
clocks for subsequent data phases (in the case of a
burst) before a retry must be requested by the
S5933.
The S5933 also requests a retry if an initiator at-
tempts to burst past the end of a Pass-Thru region.
The S5933 updates the Pass-Thru Address Register
(APTA) for each data phase during bursts, and if the
updated address is not within the current Pass-Thru
region, a retry is requested.
For example, a PCI system may map a 512 byte
Pass-Thru memory region to 0DC000h to 0DC1FFh.
A PCI initiator attempts a four DWORD burst with a
starting address of 0DC1F8h. The first and second
data phases complete (filling the DWORDs at
0DC1F8h and 0DC1FCh), but the third data phase
causes the S5933 to request a retry. This forces the
initiator to present the address 0DC200h on the PCI
bus. If this address is part of another S5933 Pass-
Thru region, the device accepts the access.
12.2.1.4 PCI Write Retries
When the S5933 requests a retry for a PCI Pass-
Thru write, it indicates that the Add-On is still com-
pleting a previous Pass-Thru write access. The
Pass-Thru Address and Data Register contents
(APTA and APTD) are still required for the previous
Pass-Thru operation and cannot be updated by the
PCI interface until the access completes (the Add-On
asserts PTRDY#).
When the Add-On is busy completing a Pass-Thru
write, the S5933 requests an immediate retry for all
Pass-Thru region accesses, allowing the PCI bus to
perform other operations. PCI Operation Registers
may be accessed while the Add-On is still completing
a Pass-Thru access. Only Pass-Thru region ac-
cesses receive retry requests.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S5933QE | PCI BUS CONTROLLER, PQFP160 |
| S6A0032 | 16 X 80 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC138 |
| S6A0069 | 16 X 40 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC80 |
| S6A0078 | 34 X 120 DOTS DOT MAT LCD DRVR AND DSPL CTLR, UUC183 |
| S80296SA40 | 16-BIT, 40 MHz, MICROCONTROLLER, PQFP100 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S5933QC | 制造商:AMC 功能描述:IC |
| S5935 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935_07 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S59355QRC | 制造商:AppliedMicro 功能描述: |
| S5935QF | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。