
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
2-6
S5933
PCI CONTROLLER
DEVICE SPECIFICATION
PASS-THRU
Figure 2-5 depicts the Pass-Thru concept that allows
actual PCI bus transactions to be executed in real
time with the Add-On interface. The Pass-Thru fea-
ture can be used to achieve high-performance burst
transfers between the PCI bus and Add-On bus ex-
ternal peripherals or memory devices. In the Pass-
Thru mode, the S5933 provides the benefits of the
configuration registers and full PCI Bus Specification
3.1 compliance, while permitting customization and
flexibility in the implementation of the Add-On prod-
uct.
The Pass-Thru logic is comprised of one address
register and two data registers (one for each direc-
tion). Control information necessary to define the cur-
rent (Pass-Thru) PCI bus transaction is also provided
to the Add-On interface on dedicated S5933 package
pins.
2.1
PCI AGENT
The S5933 was designed to serve as an “endpoint”
within a given PCI system. This means that it is the
final point in a data transfer (for example, a video
screen, network, sound output, or storage device)
and/or the beginning point of a data transfer (for ex-
ample, video source, network, audio source, or stor-
age device). Some PCI elements, termed “bridges,”
allow for data transactions to span to other bus stan-
dards and therefore are not “endpoints.”
As a PCI bus agent, the S5933 is required to support
the configuration registers in order to be compliant
with the PCI Specification. These configuration regis-
ters provide for a standardized method for system
platform software to integrate Add-On functions in a
machine. Another important aspect of the standard is
that all PCI bus agents can be controlled (enabled/
disabled, assigned physical address space, etc.) in a
common manner, regardless of function, by the host-
ing system. These configuration registers defined by
the PCI standard (and present within the S5933) are
described in Chapter 4.
Figure 2-5. Pass-Thru Concept
32
30
8
1
+1
(DURING BURSTS)
REGISTER
PCI
BUS
INTERFACE
PASS-THRU
DECODERS
+ CONTROL
PCI
ADDRESS
PCI
WRITE DATA
PASS THRU "ATTENTION"
PASS THRU COMPLETE "READY"
32
DATA
32
PCI
READ DATA
REGISTER
PASS-THRU
READ
DATA
PASS-THRU
WRITE
DATA
PASS-THRU
ADDRESS
REGISTER
COUNTER
CYCLE
IDENTIFICATION
INFORMATION
(BYTE ENABLES,
BURSTING,
WRITE VS READ
DECODE REGION)
ADD-ON
INTERFACE