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參數(shù)資料
| 型號(hào)： | S5933Q/7C |
| 廠商： | APPLIEDMICRO INC |
| 元件分類： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PQFP160 |
| 封裝： | PLASTIC, QFP-160 |
| 文件頁(yè)數(shù)： | 210/327頁(yè) |
| 文件大小： | 1976K |
| 代理商： | S5933Q/7C |
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
15-61
PCI CONTROLLER
S5933
The first parameter to each of these functions, port, is
the hardware port to read/write. The second param-
eter, buf, is an address of a buffer to be read/written
to the hardware port. The final parameter, count, is
the number of bytes/words/dwords to be read/written.
The code to implement a FIFO transfer is relatively
simple. The following program fragment shows trans-
fers in both directions (read and write PCI Device).
See Code Segment 6.
First, read and write arrays are declared to be re-
trieved/sent to the PCI device. The function insd() is
then used to retrieve data from the FIFO on the PCI
device and the function outsd() is used to send the
data to the FIFO. The only precaution here is that the
count parameter is the number of DWORDS to be
transferred, not the number of bytes, therefore
sizeof(read_data) must be divided by the size of a
double-word. The Bus Master Control Register may
be used to determine the fullness of the inbound and
outbound FIFOs.
Code Segment 6
dword read_data[10];
/* Data to be read from PCI */
dword write_data[10];
/* Data to be written to PCI */
/* Retrieve data from PCI device */
insd(amcc_op_reg_base_address + AMCC_OP_REG_FIFO,
read_data, sizeof(read_data) / sizeof(dword));
/* Send data to PCI device */
outsd(amcc_op_reg_base_address + AMCC_OP_REG_FIFO,
write_data, sizeof(write_data) / sizeof(dword));
Bus-Master Transfers
The S5933 also has a bus master transfer feature.
This allows the host computer to transfer data to the
PCI device without consuming processor bandwidth
for the actual transfer, only for setting up the transfer,
possibly monitoring the transfer, and processing the
interrupt that may be generated when the transfer is
complete.
Bus master transfers are more difficult to set up than
a FIFO transfer. They also have the limitation that the
transfer must begin on a DWORD boundary. If the
data to be transferred does not begin on a DWORD
boundary, the bytes preceding the boundary could be
sent/received via the mailbox registers. Bus master
transfers also have the advantage that both a read
and a write may take place at the same time (time-
sharing the PCI bus, of course).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S5933QC | 制造商:AMC 功能描述:IC |
| S5935 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S5935_07 | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
| S59355QRC | 制造商:AppliedMicro 功能描述: |
| S5935QF | 制造商:AMCC 制造商全稱:Applied Micro Circuits Corporation 功能描述:PCI Product |
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