
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
4-2
PCI CONTROLLER
S5933
DEVICE SPECIFICATION
4.
PCI CONFIGURATION REGISTERS ............................................................................... 4-3
4.1 VENDOR IDENTIFICATION REGISTER (VID) ..................................................................................... 4-4
4.2 DEVICE IDENTIFICATION REGISTER (DID) ...................................................................................... 4-5
4.3 PCI COMMAND REGISTER (PCICMD) ............................................................................................... 4-6
4.4 PCI STATUS REGISTER (PCISTS) ...................................................................................................... 4-8
4.5 REVISION IDENTIFICATION REGISTER (RID) ................................................................................. 4-10
4.6 CLASS CODE REGISTER (CLCD) .................................................................................................... 4-11
4.7 CACHE LINE SIZE REGISTER (CALN) ............................................................................................. 4-15
4.8 LATENCY TIMER REGISTER (LAT) ................................................................................................... 4-16
4.9 HEADER TYPE REGISTER (HDR) .................................................................................................... 4-17
4.10 BUILT-IN SELF-TEST REGISTER (BIST) .......................................................................................... 4-18
4.11 BASE ADDRESS REGISTERS (BADR) ............................................................................................. 4-19
4.12 EXPANSION ROM BASE ADDRESS REGISTER (XROM) ................................................................ 4-23
4.13 INTERRUPT LINE REGISTER (INTLN) ............................................................................................. 4-25
4.14 INTERRUPT PIN REGISTER (INTPIN) .............................................................................................. 4-26
4.15 MINIMUM GRANT REGISTER (MINGNT) ........................................................................................ 4-27
4.16 MAXIMUM LATENCY REGISTER (MAXLAT) ..................................................................................... 4-28
CONTENTS
PCI Configuration Space Header
,,,
00
04
08
0C
10
14
18
1C
20
24
28
2C
30
34
38
3C
31
23
24
16 15
8 7
LATENCY TIMER
INTERRUPT PIN
MIN_GNT
MAX_LAT
INTERRUPT LINE
EXPANSION ROM BASE ADDRESS
HEADER TYPE = 0
BASE ADDRESS REGISTER #0
BASE ADDRESS REGISTER #1
BASE ADDRESS REGISTER #2
BASE ADDRESS REGISTER #3
BASE ADDRESS REGISTER #4
BASE ADDRESS REGISTER #5
RESERVED = 0's
BIST
REV ID
CACHE LINE SIZE
VENDOR ID
COMMAND
DEVICE ID
CLASS CODE
STATUS
00
LEGEND
,
Note:
Some registers are a combination of the above. See individual sections
for full description.
EPROM IS DATA SOURCE (READ ONLY)
CONTROL FUNCTION
EPROM INITIALIZED RAM (CAN BE ALTERED FROM PCI PORT)
EPROM INITIALIZED RAM (CAN BE ALTERED FROM ADD-ON PORT)
HARD-WIRED TO ZEROES