
3-9
ARCHITECTURAL OVERVIEW
S5933
INTRODUCTION TO THE PCI LOCAL BUS
The local bus concept was developed to break the
PC data bottleneck. Traditional PC bus architectures
are inadequate to meet the demands of today’s
graphics-oriented systems and large application
sizes. A local bus moves peripherals off the I/O bus
and places them closer to the system’s processor
bus, providing faster data transfer between the pro-
cessor and peripherals.
The PCI Local Bus addresses the industry’s need for
a local bus standard that is not directly dependent on
the speed and size of the processor bus, and that is
both reliable and expandable. It represents the first
time in the history of the PC industry that a common
bus, independent of microprocessor design and
manufacturer, has been adopted and used by rival
PC computer architectures. PCI offers simple “plug
and play” capability for the end user, and its perfor-
mance is more than adequate for the most demand-
ing applications, such as full-motion video.
FEATURES
PCI 2.1 Master/Slave Controller
Generic 8/16/32-bit Add-On user bus
Four definable memory block Pass-Thru regions
Direct Add-On mailbox data strobe pin for PCI
interrupt
Optional boot load/external BIOS serial or byte-
wide nvRAM
Two 32 Byte FIFOs and 32 byte mailboxes
Industry standard 160-pin PQFP
APPLICATIONS
Digital Video
Networking
Multimedia
Data Aquisition
Figure 1. S5933 Block Diagram
FIFO
DECODER
MAILBOXES
PASS THRU DATA
BUFFER
PASS THRU ADDRESS
WRITE
ADDRESS
LATCH
WRITE
READ
MUX/
DEMUX
PROGRAM–
MABLE
DECODER
CONFIG.
REGS
CONTROL
BUFFERS & LATCHES
PCI
BUS
ADDR
DATA BUS
SELECT &
CONTROL
ADD-ON
INTERFACE
STATUS &
INTERRUPT
8/16/32
BIOS ROM INTERFACE
PCI Bus Master (DMA)Transfer Counters