
Applied Micro Circuits Corporation
6195 Lusk Blvd., San Diego, CA 92121 (619) 450-9333
15-6
PCI PCB DESIGN LAYOUT GUIDELINES
FERRITE BEADS
In many applications the requirement for ferrite
beads to reduce high frequency noise is unneces-
sary once the above indicated board layout and by-
pass practices have been followed. However, in
some applications high frequency noise may persist.
In these cases the addition of a ferrite bead to the
input +V power entry point as shown in figure 1 may
be necessary. The size and type of material used
will vary depending on the particular design and
electrical noise to be eliminated. Consult the bead
manufacturer data books to determine the best fit.
Expect to try a small selection of beads to achieve
best results. Use a single pass thru or one turn to
increase effectiveness of the bead. DO NOT series
beads to increase impedance. Use a cracked air gap
bead to reduce saturation effects as necessary.
CRITICAL TRACE LAYOUT
AMCC's S5933 PCI controller is very powerful and
flexible. It operates at clock and data bus speeds of
up to 33 megahertz. Data bus transfer operations
can occur in 30 nanoseconds with signal rise and fall
times of 3 nanoseconds. At these speeds, signal
traces look more like transmission lines where trace
impedance becomes an important factor. Carefull at-
tention to trace lengths and routing will prevent im-
pedance caused ringing and will preserve signal rise
and fall times. As a last design issue, standard PCI
specifications require the following design criteria be
adhered to for all PCI bus controller devices.
1.
Trace lengths for each 32 bit interface data sig-
nal from the S5933 to the PCI bus is limited to a
maximum of 1.5 inches for all 32 bit and 64 bit
cards.
2.
Trace lengths for the balance of the PCI bus
signals, used in the 64 bit extension, is limited to
a maximum of 2.0 inches from the S5933 to the
PCI bus.
3. The trace connecting the S5933 PCI clock signal
(S5933 pin 142) to the PCI bus connector must
be 2.5 inches +/- .1 inches in length and can be
routed to only one load. It may be necessary to
"snake" this trace, as shown in figure 1, depend-
ing on the physical location of the PCI controller
IC on the PCB to ensure this requirement is met.
Ensure all corners of this trace are rounded. Do
not use 90 degree sharp corners.
4.
The unloaded impedance of a shared PCI signal
trace on the expansion card must be held within a
60 to 100 ohm range.