
Advance Information
MT9072
7
Maskable Interrupts
T1/J1 Mode Interrupts
E1 Mode Interrupts
HDLC Interrupts
Framing bit error counter
overflow
CRC-6 error counter
overflow
Out of frame alignment
counter overflow
Change of frame alignment
counter overflow
Bipolar violation counter
overflow
PRBS error counter overflow
PRBS multiframe counter
overflow
Multiframes out of alignment
counter overflow
Change of state of terminal
frame synchronization
Change of state of
multiframe synchronization
Receive framing bit error
Change of receive frame
alignment after a reframe
Reception of a severely
errored frame
Reception of AIS
Receive CRC-6 error
Reception of digital LOS
D4 yellow alarm detected
D4 yellow alarm detected for
48ms
Secondary D4 yellow alarm
received
ESF yellow alarm received
T1DM yellow alarm received
Receive bipolar violation
Receive PRBS error
Pulse density violation
Loop code enable detected
Loop code disable detected
Receive new bit oriented
message (debounced)
Bit oriented message match
detected
Signaling (AB or ABCD) bit
change
Receive FEBE and RAI
Receive slip
Receive Y-bit
Receive V3 auxiliary pattern
(0101010…)
Receive change of state of
RAI
Receive change of state of
AIS
Receive change of state of
AIS in timeslot 16
Change of state of reception
of digital LOS
Remote CRC-4 and RAI for
10ms
Remote CRC-4 and RAI for
450ms
Reception of consecutive
errored FASs
Remote CRC-4 multiframe
generator/detector failure
Change of state of CRC-4
multiframe synchronization
Change of state of signaling
multiframe synchronization
Change of state of basic
frame alignment
Loss of frame sync counter
overflow
FAS error counter overflow
FAS error indication
FAS bit error counter
overflow
FAS bit error indication
CRC-4 error counter
overflow
Receive CRC-4 error
Receive bipolar violation
error counter overflow
Receive bipolar violation
Receive E-bit counter
overflow
Receive E-bit error
PRBS multiframe counter
overflow
PRBS error counter overflow
Go ahead pattern received
End of packet received
End of packet transmitted
End of packet read from
receive FIFO
Transmit FIFO low (16 bytes)
Frame abort received
Transmit FIFO underrun
Receive FIFO full (above 16
byte threshold
Receive FIFO overflow