
MT9072
Advance Information
134
Bit
Name
Functional Description
15
FEOI
Framing Bit Error Counter Overflow Interrupt.
When unmasked this interrupt bit goes high
whenever the framing bit error counter changes from FFH to 00H. This bit is reset after a
read of Y34 or Y24.
14
CRCOI
CRC-6 Error Counter Overflow Interrupt.
When unmasked this interrupt bit goes high
whenever the CRC-6 error counter changes from FFH to 00H. This bit is reset after a read of
Y34 or Y24.
13
OOFOI
Out Of Frame Counter Overflow Interrupt.
When unmasked this interrupt bit goes high
whenever the out of frame counter changes state from changes from FFH to 00H. This bit is
reset after a read of Y34 or Y24.
12
COFAOI
Change of Frame Alignment Counter Overflow Interrupt
. When unmasked this interrupt
bit goes high whenever the change of frame alignment counter changes from FFH to 00H.
This bit is reset after a read of Y34 or Y24.
11
BPVOI
Bipolar Violation Counter Overflow Interrupt.
When unmasked this interrupt bit goes high
whenever the bipolar violation counter changes from FFH to 00H. This bit is reset after a read
of Y34 or Y24.
10
PRBSOI
Pseudo Random Bit Sequence Error Counter Overflow Interrupt.
When unmasked this
interrupt bit goes high whenever the PRBS error counter changes from FFH to 00H. This bit is
reset after a read of Y34 or Y24.
9
PRBSMFOI
Pseudo Random Bit Sequence MultiframeCounter Overflow Interrupt.
When unmasked
this interrupt bit goes high whenever the multiframe counter attached to the PRBS error
counter change from. FFH to 00H. 1 - unmasked, 0 - masked. This bit is reset after a read of
Y34 or Y24.
8
MFOOFOI
Multiframes Out Of Sync Overflow Interrupt.
When unmasked this interrupt bit goes
high whenever the multiframes out of frame counter changes from FFH to 00H. This bit is
reset after a read of Y34 or Y24.
7
TFSYNI
Terminal Frame Synchronization Interrupt.
When unmasked this interrupt bit goes high
whenever a change of state of terminal frame synchronization condition exists. This bit is
reset after a read of Y34 or Y24.
6
MFSYNI
Multiframe Synchronization Interrupt.
When unmasked this interrupt bit goes high
whenever a change of state of multiframe synchronization condition exists. This bit is reset
after a read of Y34 or Y24.
5
FBEI
Framing Bit Error Interrupt.
When unmasked this interrupt bit goes high whenever an
erroneous framing bit is detected (provided the circuit is in terminal frame sync). This bit is
reset after a read of Y34 or Y24.
4
COFAI
Change of Frame Alignment Interrupt.
When unmasked this interrupt bit goes high
whenever a change of frame alignment occurs after a reframe. This bit is reset after a read
of Y34 or Y24.
3
SEFI
Severely Errored Frame Interrupt.
When unmasked this interrupt bit goes high whenever
a sequence of 2 framing errors out of 6 occurs. This bit is reset after a read of Y34 or Y24.
2
AISI
Alarm Indication Signal Interrupt.
When unmasked this interrupt bit goes high whenever
a received all ones condition exists.This bit is reset after a read of Y34 or Y24.
1
CRCI
CRC-6 Error Interrupt.
When unmasked this interrupt bit goes high whenever a local CRC-6
error occurs. This bit is reset after a read of Y34 or Y24.
0
LOSI
LOSS Interrupt.
When unmasked this interrupt bit goes high upon loss of Signal. This bit is
reset after a read of Y34 or Y24.
Table 105 - Receive Synchronization and Alarm Interrupt Status Register(Y34) (T1)