
PRELIMINARY
XRT86SH328
75
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
Unstable Defect" Condition.
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1 - Indicates that the Receive STS-1/STS-3 TOH Processor block is currently declaring the "K1, K2 Byte Unstable
Defect" Condition.
BIT 4 - SF (Signal Failure) Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STS-1/STS-3 TOH Processor block is currently
declaring the SF defect condition. The Receive STS-1/STS-3 TOH Processor block will declare the SF defect condition
anytime it has determined that the number of B2 byte errors (measured over a user-selected period of time) exceeds a
certain user-specified B2 Byte Error threshold.
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0 - Indicates that the Receive STS-1/STS-3 TOH Processor block is NOT currently declaring the SF Defect condition.
This bit is set to "0" when the number of B2 byte errors (accumulated over a given interval of time) does not exceed the
"SF Defect Declaration" threshold.
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1 - Indicates that the Receive STS-1/STS-3 TOH Processor block is currently declaring the SF Defect condition.
This bit is set to "1" when the number of B2 errors (accumulated over a given interval of time) does exceed the "SF
Defect Declaration" threshold
BIT 3 - SD (Signal Degrade) Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STS-1/STS-3 TOH Processor block is currently
declaring the SD defect condition. The Receive STS-1/STS-3 TOH Processor block will declare the SD defect condition
anytime it has determined that the number of B2 byte errors (measured over a user-selected period of time) exceeds a
certain user-specified B2 Byte Error threshold.
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0 - Indicates that the Receive STS-1/STS-3 TOH Processor block is NOT currently declaring the SD Defect condition.
This bit is set to 0 when the number of B2 errors (accumulated over a given interval of time) does not exceed the SD
Declaration threshold.
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1 - Indicates that the Receive STS-1/STS-3 TOH Processor block is currently declaring the SD Defect condition.
This bit is set to 1 when the number of B2 errors (accumulated over a given interval of time) does exceed the SD Defect
Declaration threshold.
BIT 2 - LOF (Loss of Frame) Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STS-1/STS-3 TOH Processor block is currently
declaring the LOF defect condition. The Receive STS-1/STS-3 TOH Processor block will declare the LOF defect
condition if it has been declaring the SEF condition for 24 consecutive STS-1/STS-3 frame periods. Once the Receive
STS-1/STS-3 TOH Processor block has declared the LOF defect condition, then the Receive STS-1/STS-3 TOH
Processor block will clear the LOF defect if it has not been declaring the SEF condition for 3ms (or 24 consecutive STS-
1/STS-3 frame periods).
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0 - Indicates that the Receive STS-1/STS-3 TOH Processor block is NOT currently declaring the LOF defect condition.
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1 - Indicates that the Receive STS-1/STS-3 TOH Processor block is currently declaring the LOF defect condition.
BIT 1 - SEF (Severely Errored Frame) Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STS-1/STS-3 TOH Processor block is currently
declaring the SEF defect condition. The Receive STS-1/STS-3 TOH Processor block will declare the SEF defect
condition if it detects Framing Alignment byte errors in four consecutive STS-1/STS-3 frames. Once the Receive TOH
Processor block declares the SEF defect condition, the Receive STS-1/STS-3 TOH Processor block will then clear the
SEF defect condition if it detects two consecutive STS-1/STS-3 frames with un-erred framing alignment bytes. If the
Receive TOH Processor block declares the SEF defect condition for 24 consecutive STS-1/STS-3 frame periods, then
it will declare the LOF defect condition.
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0 - Indicates that the Receive STS-1/STS-3 TOH Processor block is NOT currently declaring the SEF defect condition.
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1 - Indicates that the Receive STS-1/STS-3 TOH Processor block is currently declaring the SEF defect condition.
BIT 0 - LOS (Loss of Signal) Defect Declared
This READ-ONLY bit-field indicates whether or not the Receive STS-1/STS-3 TOH Processor block is currently
declaring the LOS (Loss of Signal) defect condition. The Receive STS-1/STS-3 TOH Processor block will declare the
LOS defect condition if it detects LOS_THRESHOLD[15:0] consecutive All Zero bytes in the incoming STS-1/STS-3
data stream.
N
OTE
:
The user can set the LOS_THRESHOLD[15:0] value by writing the appropriate data into the Receive STS-
1/STS-3 Transport - LOS Threshold Value Register (Address Location= 0x022E and 0x022F).