
PRELIMINARY
XRT86SH328
229
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
`
1 - Indicates that the Receive DS3 Framer block has declared the last one-second accumulation period as being an
Erred Second.
BIT 0 - Severely Erred Second:
This READ-ONLY bit-field indicates whether or not the Receive DS3 Framer block has declared the last one-
second accumulation period as being a Severely Erred Second.
The Receive DS3 Framer block will declares a given one-second period as being a severely erred second if it
determines that the BER (Bit Error Rate) during this one-second accumulation period is greater than 10-3
errors/second.
`
0 - Indicates that the Receive DS3 Framer block has NOT declared the last one-second accumulation period as being
a severely-erred second.
`
1 - Indicates that the Receive DS3 Framer block has declared the last one-second accumulation period as being a
severely-erred second.
BIT [7:0] - One-Second LCV Accumulation Count[15:8]:
These READ-ONLY bits, along with that within the DS3 Framer Block - One Second LCV Accumulation Count Register
- MSB combine to reflect the cumulative number of Line Code Violations that the Receive DS3 Framer block has
detected within the incoming DS3 data-stream, during the last one-second accumulation period. This register contains
the Most Significant byte of this 16-bit expression.
N
OTE
:
This register is only active if the XRT86SH328 has been configured to operate in the M13 MUX Mode.
BIT [7:0] - One-Second LCV Accumulation Count[7:0]:
These READ-ONLY bits, along with that within the DS3 Framer Block - One Second LCV Accumulation Count Register
- LSB combine to reflect the cumulative number of Line Code Violations that the Receive DS3 Framer block has
detected within the incoming DS3 data-stream, during the last one-second accumulation period. This register contains
the Least Significant byte of this 16-bit expression.
N
OTE
:
This register is only active if the XRT86SH328 has been configured to operate in the M13 MUX Mode.
BIT [7:0] - One-Second P-Bit Error Accumulation Count[15:8]:
T
ABLE
327: DS3 F
RAMER
B
LOCK
- LCV O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- MSB (A
DDRESS
= 0
X
0E6E)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
One_Second_LCV_Accum_Count[15:8]
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
T
ABLE
328: DS3 F
RAMER
B
LOCK
- LCV O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- LSB (A
DDRESS
= 0
X
0E6F)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
One_Second_LCV_Accum_Count[7:0]
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
T
ABLE
329: DS3 F
RAMER
B
LOCK
- P-B
IT
E
RROR
O
NE
S
ECOND
A
CCUMULATOR
R
EGISTER
- MSB (A
DDRESS
=
0
X
0E70)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
One_Second_P_Bit_Error_Accum_Count[15:8]
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0