
PRELIMINARY
XRT86SH328
231
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
BIT [7:0] - Transmit LAPD Message Size[7:0]:
These READ/WRITE bit-fields permit the user to specify the size of the information payload (in terms of bytes) within
the very next outbound LAPD/PMDL Message whenever Bit 7 (Transmit LAPD Any) within the DS3 Framer Block -
Transmit LAPD Configuration Register has been set to 1.
BIT [7:0] - Receive LAPD Message Size[7:0]:
These READ-ONLY bit-fields indicate the size of the most recently received LAPD/PMDL Message, whenever Bit 7
(Receive LAPD Any) within the DS3 Framer Block - Receive LAPD Control Register has been set to 1.
The contents of this register reflect the Receive LAPD Message size, in terns of bytes.
BIT7 - Reserved:
BIT6 - Change of DS2 Loop-back Request - DS2 Channel 6 Interrupt Enable:
This READ/WRITE bit-field is used to either enable or disable the Change of DS2 Loop-back Request Interrupt
associated with DS2 Channel 6. If this interrupt is enabled, then the XRT86SH328 will generate an interrupt in
response to either of the following events.
Whenever the Receive DS3 Framer block detects and flags the DS2 Loop-back request for DS2 Channel 6.
Whenever the Receive DS3 Framer block clears the DS2 Loop-back request for DS2 Channel 6.
`
0 - Disables the Change of DS2 Loop-back Request Interrupt for DS2 Channel 6.
`
1 - Enables the Change of DS2 Loop-back Request Interrupt for DS2 Channel 6.
BIT 5 - Change of DS2 Loop-back Request - DS2 Channel 5 Interrupt Enable:
T
ABLE
333: DS3 F
RAMER
B
LOCK
- T
RANSMIT
LAPD B
YTE
C
OUNT
R
EGISTER
(A
DDRESS
= 0
X
0E83)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Tx_LAPD_MESSAGE_SIZE[7:0]
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
T
ABLE
334: DS3 F
RAMER
B
LOCK
- R
ECEIVE
LAPD B
YTE
C
OUNT
R
EGISTER
(A
DDRESS
= 0
X
0E84)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Rx_LAPD_MESSAGE_SIZE[7:0]
R/O
R/O
R/O
R/O
R/O
R/O
R/O
R/O
0
0
0
0
0
0
0
0
T
ABLE
335: DS3 F
RAMER
B
LOCK
- R
ECEIVE
DS2 L
OOP
-B
ACK
R
EQUEST
I
NTERRUPT
E
NABLE
R
EGISTER
(A
DDRESS
= 0
X
0E90)
BIT7
BIT6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
BIT 0
Reserved
Change of
DS2 Loop-
back
Request -
DS2
Channel 6
Interrupt
Enable
Change of
DS2 Loop-
back
Request -
DS2
Channel 5
Interrupt
Enable
Change of
DS2 Loop-
back
Request -
DS2
Channel 4
Interrupt
Enable
Change of
DS2 Loop-
back
Request -
DS2
Channel 3
Interrupt
Enable
Change of
DS2 Loop-
back
Request -
DS2
Channel 2
Interrupt
Enable
Change of
DS2 Loop-
back
Request -
DS2
Channel 1
Interrupt
Enable
Change of
DS2 Loop-
back
Request -
DS2
Channel 0
Interrupt
Enable
R/O
R/W
R/W
R/W
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0