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參數(shù)資料
| 型號(hào)： | XRT86SH328IB |
| 廠商： | EXAR CORP |
| 元件分類： | 數(shù)字傳輸電路 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | DATACOM, FRAMER, PBGA568 |
| 封裝： | 31 X 31 MM, PLASTIC, BGA-568 |
| 文件頁(yè)數(shù)： | 303/339頁(yè) |
| 文件大?。?/td> | 1996K |
| 代理商： | XRT86SH328IB |
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PRELIMINARY
XRT86SH328
293
REV. P1.0.6
28-CHANNEL DS1/E1 FRAMER/LIU WITH DS3 MUX & VT-MAPPER - SONET APPLICATIONS
Code (associated with "Code 2") within the incoming DS1 data-stream.
`
1 = Indicates that the Receive DS1 Framer block is currently detecting (and flagging) the "Loop-Back Deactivate"
Code (associated with "Code 2") within the incoming DS1 data-stream.
Bit 1 - Change of Receive Loop-Back Activation State Interrupt Status - Code 2:
This RESET-upon-READ bit-field indicates whether or not the Receive DS1 Framer block has generated the "Change
of Receive Loop-Back Activation State" Interrupt (based upon loop-code "Code 2"), since the last read of this register.
The Receive DS1 Framer block will generate the "Change of Receive Loop-Back Activation State" Interrupt in response
to either of the following events.
Whenever the Receive DS1 Framer block detects (and validates) the "Loop-Back Activate" Code (associated with
"Code 2") within the incoming DS1 data-stream
Whenever the Receive DS1 Framer block ceases to detect the "Loop-Back Activate" code (associated with "Code
2") within the incoming DS1 data-stream.
`
0 = Indicates that the Receive DS1 Framer block has NOT generated the "Change of Receive Loop-Back Activation
State" Interrupt for "Code 2" since the last read of this register.
`
1 = Indicates that the Receive DS1 Framer block has generated the "Change of Receive Loop-Back Activation State"
Interrupt for "Code 2" since the last read of this register.
Bit 0 - Change of Receive Loop-Back Deactivation Status Interrupt Status - Code 2:
This RESET-upon-READ bit-field indicates whether or not the Receive DS1 Framer block has generated the "Change
of Receive Loop-Back Deactivation State" Interrupt (based upon loop-code "Code 2"), since the last read of this register.
The Receive DS1 Framer block will generate the "Change of Receive Loop-Back Deactivation State" Interrupt in
response to either of the following events.
Whenever the Receive DS1 Framer block detects (and validates) the "Loop-Back Deactivate" Code (associated with
"Code 2") within the incoming DS1 data-stream
Whenever the Receive DS1 Framer block ceases to detect the "Loop-Back Deactivate" code (associated with "Code
2") within the incoming DS1 data-stream.
`
0 = Indicates that the Receive DS1 Framer block has NOT generated the "Change of Receive Loop-Back Deactivation
State" Interrupt for "Code 2" since the last read of this register.
`
1 = Indicates that the Receive DS1 Framer block has generated the "Change of Receive Loop-Back Deactivation
State" Interrupt for "Code 2" since the last read of this register.
Bits 7 through 2 - Reserved:
Bit 1 - Change of Receive Loop-Back Activation Interrupt Enable - Code 2:
This READ/WRITE bit-field permits the user to either enable or disable the "Change of Receive Loop-Back Activation
State" Interrupt associated with Loop-Code "Code 2". If the user enables the "Change of Receive Loop-Back Activation
State" Interrupt, then the Receive DS1 Framer block will generate the "Change of Receive Loop-Back Activation State"
Interrupt in response to the following events.
Whenever it detects and validates the "Receive Loop-Back Activation" Pattern (associated with "Code 2") within the
incoming DS1 data-stream, and
T
ABLE
431: T1 F
RAMER
I
NTERRUPT
EGISTER
- R
ECEIVE
L
OOP
-B
ACK
C
ODE
I
NTERRUPT
E
NABLE
R
EGISTER
- C
ODE
2 (A
DDRESS
= 0
X
NB1B,
WHERE
N
RANGES
IN
VALUE
FROM
0
X
01
TO
0
X
38)
B
IT
7
B
IT
6
B
IT
5
B
IT
4
B
IT
3
B
IT
2
B
IT
1
B
IT
0
Reserved
Change of
Receive
Loop-Back
Activation
Interrupt
Enable -
Code 2
Change of
Receive
Loop-Back
Deactivation
Interrupt
Enable -
Code 2
R/O
R/O
R/O
R/O
R/O
R/O
R/W
R/W
0
0
0
0
0
0
0
0
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT86VL32_1 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL32_2 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL32 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL32_07 | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| XRT86VL32IB | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86SH328IB-F | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC Multiplexer Voyager RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86SH328OR | 功能描述:網(wǎng)絡(luò)控制器與處理器 IC RoHS:否 制造商:Micrel 產(chǎn)品:Controller Area Network (CAN) 收發(fā)器數(shù)量: 數(shù)據(jù)速率: 電源電流（最大值）:595 mA 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:PBGA-400 封裝:Tray |
| XRT86VL30 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE T1/E1/J1 FRAMER/LIU COMBO - E1 REGISTER DESCRIPTION |
| XRT86VL30_08 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 BITS ELEMENT - HARDWARE MANUAL |
| XRT86VL30_1 | 制造商:EXAR 制造商全稱:EXAR 功能描述:SINGLE T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
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