參數(shù)資料
型號： PI7C8140AMAE
廠商： Pericom
文件頁數(shù)： 73/82頁
文件大?。?/td> 0K
描述： IC PCI-PCI BRIDGE 2PORT 128-QFP
標準包裝： 39
系列： *
應用： *
接口： *
電源電壓： *
封裝/外殼： 128-BFQFP
供應商設(shè)備封裝： 128-QFP（14x20）
包裝： 管件
安裝類型： 表面貼裝
PI7C8140A
2-PORT PCI-TO-PCI BRIDGE
Page 75 of 82
March 20, 2007 – Revision 1.01
Bit
Function
Type
Description
3
Secondary
Memory Read
Command
Alias Enable
RW
Controls bridge’s detection mechanism for matching memory read retry cycles
from the initiator on the secondary
0: exact matching for memory read retry cycles from initiator on the secondary
interface
1: alias MEMRL or MEMRM to MEMR for memory read retry cycles from
initiator on the secondary interface
Reset to 1
4
Secondary
Memory Write
Command
Alias Enable
RW
Controls bridge’s detection mechanism for matching non-posted memory write
retry cycles from the initiator on the primary interface
0: exact matching for non-posted memory write retry cycles from initiator on the
secondary interface
1: alias MEMWI to MEMW for non-posted memory write retry cycles from
initiator on the secondary interface
Reset to 0
5
Primary
Memory Read
Line/Multiple
Alias Enable
RW
Control’s bridge’s detection mechanism for matching memory read line/multiple
cycles from the initiator on the primary interface
0: exact matching for memory read line/multiple retry cycles from the initiator on
the primary interface
1: alias MEMRL to MEMRM or MEMRM to MEMRL for memory read retry
cycles from the initiator on the primary interface
Reset to 1
6
Secondary
Memory Read
Line/Multiple
Alias Enable
RW
Control’s bridge’s detection mechanism for matching memory read line/multiple
cycles from the initiator on the secondary interface
0: exact matching for memory read line/multiple retry cycles from the initiator on
the secondary interface
1: alias MEMRL to MEMRM or MEMRM to MEMRL for memory read retry
cycles from the initiator on the secondary interface
Reset to 1
7
Primary
Memory Write
and Invalidate
Command
Alias Disable
RW
Controls bridge’s detection mechanism for matching non-posted memory write
and invalidate cycles from the initiator on the primary interface
0: When accepting MEMWI command at the primary interface, bridge converts
MEMWI to MEMW command on the destination interface
1: When accepting MEMWI command at the primary interface, bridge does not
convert MEMWI to MEMW command on the destination interface
Reset to 0
8
Secondary
Memory Write
and Invalidate
Command
Alias Disable
RW
Controls bridge’s detection mechanism for matching non-posted memory write
and invalidate cycles from the initiator on the secondary interface
0: When accepting MEMWI command at the secondary interface, bridge converts
MEMWI to MEMW command on the destination interface
1: When accepting MEMWI command at the secondary interface, bridge does not
convert MEMWI to MEMW command on the destination interface
Reset to 0
07-0067
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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PI7C8148ANJ 制造商:PERICOM 制造商全稱:Pericom Semiconductor Corporation 功能描述:2-PORT PCI-TO-PCI BRIDGE ADVANCE INFORMATION
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