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P
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 6-18. EDMA3 Transfer Controller 1 Registers (continued)
HEX ADDRESS RANGE
02A2 8100
02A2 8104 - 02A2 811C
02A2 8120
02A2 8124
02A2 8128
02A2 812C
02A2 8130
02A2 8134 - 02A2 813C
02A2 8140
02A2 8144 - 02A2 823C
02A2 8240
02A2 8244
02A2 8248
02A2 824C
02A2 8250
02A2 8254
02A2 8258
02A2 825C
02A2 8260
02A2 8264 - 02A2 827C
02A2 8280
02A2 8284
02A2 8288
02A2 828C - 02A2 82FC
02A2 8300
02A2 8304
02A2 8308
02A2 830C
02A2 8310
02A2 8314
02A2 8318 - 02A2 833C
02A2 8340
02A2 8344
02A2 8348
02A2 834C
02A2 8350
02A2 8354
02A2 8358 - 02A2 837C
02A2 8380
02A2 8384
02A2 8388
02A2 838C
02A2 8390
02A2 8394
02A2 8398 - 02A2 83BC
02A2 83C0
02A2 83C4
ACRONYM
TCSTAT
-
ERRSTAT
ERREN
ERRCLR
ERRDET
ERRCMD
-
RDRATE
-
SAOPT
SASRC
SACNT
SADST
SABIDX
SAMPPRXY
SACNTRLD
SASRCBREF
SADSTBREF
-
DFCNTRLD
DFSRCBREF
DFDSTBREF
-
DFOPT0
DFSRC0
DFCNT0
DFDST0
DFBIDX0
DFMPPRXY0
-
DFOPT1
DFSRC1
DFCNT1
DFDST1
DFBIDX1
DFMPPRXY1
-
DFOPT2
DFSRC2
DFCNT2
DFDST2
DFBIDX2
DFMPPRXY2
-
DFOPT3
DFSRC3
REGISTER NAME
EDMA3TC Channel Status Register
Reserved
Error Register
Error Enable Register
Error Clear Register
Error Details Register
Error Interrupt Command Register
Reserved
Read Rate Register
Reserved
Source Active Options Register
Source Active Source Address Register
Source Active Count Register
Source Active Destination Address Register
Source Active Source B-Index Register
Source Active Memory Protection Proxy Register
Source Active Count Reload Register
Source Active Source Address B-Reference Register
Source Active Destination Address B-Reference Register
Reserved
Destination FIFO Set Count Reload
Destination FIFO Set Destination Address B Reference Register
Destination FIFO Set Destination Address B Reference Register
Reserved
Destination FIFO Options Register 0
Destination FIFO Source Address Register 0
Destination FIFO Count Register 0
Destination FIFO Destination Address Register 0
Destination FIFO BIDX Register 0
Destination FIFO Memory Protection Proxy Register 0
Reserved
Destination FIFO Options Register 1
Destination FIFO Source Address Register 1
Destination FIFO Count Register 1
Destination FIFO Destination Address Register 1
Destination FIFO BIDX Register 1
Destination FIFO Memory Protection Proxy Register 1
Reserved
Destination FIFO Options Register 2
Destination FIFO Source Address Register 2
Destination FIFO Count Register 2
Destination FIFO Destination Address Register 2
Destination FIFO BIDX Register 2
Destination FIFO Memory Protection Proxy Register 2
Reserved
Destination FIFO Options Register 3
Destination FIFO Source Address Register 3
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Peripheral Information and Electrical Specifications
79