參數(shù)資料
型號: TMX320DM647ZUT720
廠商: Texas Instruments, Inc.
英文描述: Digital Media Processor
中文描述: 數(shù)字媒體處理器
文件頁數(shù): 40/166頁
文件大小: 1341K
代理商: TMX320DM647ZUT720
www.ti.com
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3.2.3
Boot Complete (BOOTCMPLT) register
3.2.4
Priority Allocation (PRI_ALLOC)
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Figure 3-2. DSPBOOTADDR Register
31
10
9
0
BOOTADDR
Reserved
R/W-0100 0010 0010 0000 0000 00
R-0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 3-3. DSPBOOTADDR Register Field Descriptions
Bit
31:10
9:0
Field
BOOTADDR
Reserved
Value
Description
Upper 22 bits of the C64x+ DSP bootmode address
Reserved
The BOOTCMPLT register contains a BC (boot complete) field in bit 0, and a ERR (boot error) field in bits
19:16.
The BC field is written by the external host to indicates that it has completed boot. In the bootloader code,
the CPU can poll for this bit. Once this bit = 1, the CPU can begin executing from DSPBOOTADDR.
The ERR field is written by the bootloader software if the software detects a boot error. Coming out of a
boot, application software can read this field to determine if boot was accomplished. Actual error code is
determined by software.
Figure 3-3. BOOTCMPLT Register 3
31
20 19
16 15
1
0
B
C
Reserved
ERR
Reserved
R-0
R-0
R-0
R-
0
LEGEND: R/W = Read/Write; R = Read only; -
n
= value after reset
Table 3-4. BOOTCMPLT Register Field Descriptions
Bit
31:20
19:16
Field
Reserved
ERR
Value
Description
Reserved
Boot error
No error
Bootloader software detected boot error. For details on boot errors, see the
Using the
TMS320DM647x Bootloader Application Note
(literature number
SPRAAAJ1
).
Reserved
Boot Complete Flag from host. This is applicable only to host boots.
Host has not completed booting this device.
Host has completed booting this device and the DSP can begin executing from
DSPBOOTADDR.
0000
0001 – 1111
15:1
0
Reserved
BC
0
1
On the DM647/DM648 devices, each of the masters (excluding the C64x+ Megamodule) is assigned a
priority via the Priority Allocation Register (PRI_ALLOC), see
Figure 3-4
. The priority is enforced when
several masters in the system are vying for the same endpoint. A value of 000b has the highest priority,
while 111b has the lowest priority.
Device Configuration
40
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