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| 型號(hào)： | TMX320DM647ZUT720 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Digital Media Processor |
| 中文描述： | 數(shù)字媒體處理器 |
| 文件頁數(shù)： | 146/166頁 |
| 文件大?。?/td> | 1341K |
| 代理商： | TMX320DM647ZUT720 |
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6.18.2 Interrupt Controller and Pacing Interrupts
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
DSP writes may be write-protected to the Ethernet Subsystem configuration registers from addresses
0x02D0 0000 – 0x02D0 4FFF (3PGSW, MDIO, SGMII0, SGMII1, control), and the CPPI RAM. The
Ethernet Subsystem setting in the PSC is also write-protected. A specific 32-bit lock code and a 32-bit
unlock code written to ESS_LOCK register will activate or clear this option, respectively.Please see
section
Section 3.2.5
and section
Section 3.2.8
The 3-port gigabit switch block contains the following functions:
3-port gigabit switch: performs packet forwarding and routing functions, one port is internally connected
to the C64x+ DSP and two ports are brought out externally
CPDMA: performs high-speed DMA transfers with RX and TX CPPI buffers in local memory, including
channel setup and channel teardown
GMAC (Gigabit Ethernet MAC):
–
Uses Rx packet FIFO, and a TX packet FIFO to improve data transfer efficiency
–
Handles processing of Ethernet packet data, frames, and headers
–
Includes flow control
–
Provides statistics collection and reporting
The address lookup engine (ALE) processes all received packets to determine where (that is, which
packet location) to forward the packet. The ALE uses the incoming packet received port number,
destination address, source address, length/type, and VLAN information to determine how the packet
should be forwarded. The ALE outputs the port mask to the switch fabric that indicates to which packet
the port(s) should be forwarded.
The interrupt control block selects the interrupts from the 3-port gigabit switch and MDIO modules for
output to the C64x+ DSP. The miscellaneous interrupt is an immediate (non-paced) interrupt selected
from the miscellaneous interrupts (host error level, statistics level, MDIO User [2], MDIO link [2]).
The eight RX interrupts and eight TX interrupts can be paced. The 8 RX threshold interrupts and the
miscellaneous interrupts are not paced. The interrupt pacing feature limits the number of interrupts that
occur during a given period of time. For heavily loaded systems in which interrupts can occur at a very
high rate, the performance benefit is significant due to minimizing the overhead associated with servicing
each interrupt. Interrupt pacing increases the C64x+ DSP cache hit ratio by minimizing the number of
times that large interrupt service routines are moved to and from the DSP instruction cache.
MDIO
The MDIO module manages the PHY configuration and monitors status. For a list of supported registers
and register fields, see
Table 6-65
. In 10/100 mode, the GMII_MTXD(7:0) data bus uses only the lower
nibble.
SGMII
The SGMII/SerDes module contains:
Gigabit differential current mode logic (CML) receiver/transmitters
An integrated RX/TX PLL to provide the required high-quality/high-speed internal clocks
Phase-interpolator-based clock/data recovery
A bandgap reference for transmitter swing settings
Parallel-to-serial converter
Serial-to-parallel converter
Integrated receiver and transmitter termination
Configuration logic
802.3 auto-negotiation functionality (as defined in Clause 37of the IEEE Specification 802.3).
The SGMII receive interface converts the encoded receive signals from the differential receive input
Peripheral Information and Electrical Specifications
146
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| TMX320DM647ZUT900 | 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Media Processor |
| TMX320DM648ACUT7 | 制造商:Texas Instruments 功能描述:- Trays |
| TMX320DM648ACUT9 | 制造商:Texas Instruments 功能描述:- Trays |
| TMX320DM648AZUT7 | 制造商:Texas Instruments 功能描述: |
| TMX320DM648CUT7 | 制造商:Texas Instruments 功能描述:- Trays |
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