參數(shù)資料
型號(hào)： TMX320DM647ZUT720
廠商： Texas Instruments, Inc.
英文描述： Digital Media Processor
中文描述： 數(shù)字媒體處理器
文件頁數(shù)： 32/166頁
文件大?。?/td> 1341K
代理商： TMX320DM647ZUT720
www.ti.com
P
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 2-5. TERMINAL FUNCTIONS (GROUND and POWER SUPPLY) (continued)
TERMINAL NAME
NO
TYPE
INTERNAL
PULLUP/PULLD
OWN
OPER VOLT
DESCRIPTION
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
D
VDD18
V
REFSSTL
B5
B15
B18
B23
C3
C10
C13
C21
E5
F8
F14
F16
F18
G9
G11
G13
G15
G17
H10
H12
H14
C11
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
1.8-V I/O supply voltage (DDR2 Memory Controller)
(DVDD18/2)-V reference for SSTL buffer (DDR2
Memory Controller0. This input voltage cn be generated
directly from DVDD18 using two 1-K
resistors to form a
resister divider circuit.
Die-side 1.2-V core supply voltage monitor pin. The
monitor pins indicate the voltage on the die, and,
therefore, provide the best probe point for voltage
monitoring purposes. If the CVDDMON pin is not used, it
should be connected directly to the 1.2-V core supply.
Die-side 1.8-V I/O supply voltage monitor pin.
Die-side 3.3-V I/O supply voltage monitor pin.
V
CCMON
L19
V
DD18MON
V
DD33MON
B2
G21
Reserved
RSV 1
RSV 2
RSV 3
RSV 4
RSV 5
RSV 6
RSV 7
L20
L21
D2
D1
D4
D3
H7
A
A
O
O
O
O
A
Reserved. Unconnected
Reserved . Unconnected
Reserved . Unconnected
Reserved . Unconnected
Reserved . Unconnected
Reserved . Unconnected
Reserved. These pins must be connected directly to V
SS
for proper device operation.
Reserved. These pins must be connected directly to V
SS
for proper device operation.
Reserved . Unconnected
Reserved . Unconnected
Reserved This pin must be connected directly to V
SS
for
proper device operation.
Reserved. This pin must be connected directly to 1.8-V
I/O supply
RSV 8
H8
A
RSV 9
RSV 10
RSV 11
M2
A2
E2
A
A
RSV 12
E1
Device Overview
32
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