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P
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 6-2. DM647/DM648 LPSC Assignments
LPSC NUMBER
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
PERIPHERAL/ MODULE
EDMA3CC
Reserved
Reserved
Reserved
Reserved
Reserved
Reserved
DDR2 Memory Controller
UHPI
VLYNQ
GPIO
TIMER0
TIMER1
Reserved
Reserved
Reserved
Reserved
SPI
I2C
LPSC NUMBER
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
PERIPHERAL/ MODULE
PCI
VP0
VP1
VP2
VP3
VP4
EMIFA
TIMER2
TIMER3
VIC
McASP
UART
VICP
Reserved
C64x+ CPU
Ethernet Subsystem
Table 6-3. PSC Register Memory Map
HEX ADDRESS RANGE
0x0204 6000
0x0204 6004- 0x0204 600F
0x0204 6010
0x0204 6014
0x0204 6018
0x0204 601C- 0x0204 603F
0x0204 6040
0x0204 6044
0x0204 6048- 0x0204 604F
0x0204 6050
0x0204 6054
0x0204 6058- 0x0204 605F
0x0204 6060
0x0204 6064- 0x0204 6067
0x0204 6068
0x0204 606C- 0x0204 611F
0x0204 6120
0x0204 6124- 0x0204 6127
0x0204 6128
0x0204 612C- 0x0204 61FF
0x0204 6200
0x0204 6204- 0x0204 62FF
0x0204 6300
0x0204 6304- 0x1C4 150F
REGISTER ACRONYM
PID
–
–
DESCRIPTION
Peripheral Revision and Class Information Register
Reserved
Reserved
Reserved
Interrupt Evaluation Register
Reserved
Reserved
Module Error Pending 1 (mod 32- 63) Register
Reserved
Reserved
Module Error Clear 1 (mod 32 - 63) Register
Reserved
Reserved
Reserved
Reserved
Reserved
Power Domain Transition Command Register
Reserved
Power Domain Transition Status Register
Reserved
Power Domain Status 0 Register (Always On)
Reserved
Power Domain Control 0 Register (Always On)
Reserved
INTEVAL
–
–
MERRPR1
–
–
MERRCR1
–
–
–
–
–
PTCMD
–
PTSTAT
–
PDSTAT0
–
PDCTL0
–
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Peripheral Information and Electrical Specifications
59