參數(shù)資料
型號: TMX320DM647ZUT720
廠商: Texas Instruments, Inc.
英文描述: Digital Media Processor
中文描述: 數(shù)字媒體處理器
文件頁數(shù): 26/166頁
文件大小: 1341K
代理商: TMX320DM647ZUT720
www.ti.com
P
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 2-4. TERMINAL FUNCTIONS (continued)
TERMINAL NAME
NO
TYPE
INTERNAL
PULLUP/
PULLDOWN
IPU
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
IPD
OPER
VOLT
DESCRIPTION
VP2CTL2/VSCRUN
VP2D02
VP2D03
VP2D04
VP2D05
VP2D06
VP2D07
VP2D08
VP2D09
VP2D12/VRXD0
VP2D13/VRXD1
VP2D14/VRXD2
VP2D15/VRXD3
VP2D16/VTXD0
VP2D17/VTXD1
VP2D18/VTXD2
VP2D19/VTXD3
Y1
W5
AA2
Y3
U6
Y2
W3
V5
W4
W2
V3
V4
U1
U3
U2
U5
U4
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
Video Port 2 Control 2 or VLYNQ serial clock run request (I/O)
Video Port 2 Data 2
Video Port 2 Data 3
Video Port 2 Data 4
Video Port 2 Data 5
Video Port 2 Data 6
Video Port 2 Data 7
Video Port 2 Data 8
Video Port 2 Data 9
Video Port 2 Data 12 or VLYNQ receive data pin [0] (I)
Video Port 2 Data 13 or VLYNQ receive data pin [1] (I)
Video Port 2 Data 14 or VLYNQ receive data pin [2] (I)
Video Port 2 Data 15 or VLYNQ receive data pin [3] (I)
Video Port 2 Data 16 or VLYNQ transmit data pin [0] (O)
Video Port 2 Data 17 or VLYNQ transmit data pin [1] (O)
Video Port 2 Data 18 or VLYNQ transmit data pin [2] (O)
Video Port 2 Data 19 or VLYNQ transmit data pin [3] (O)
VIDEO PORT 3 OR EMIFA
3.3 V
Video Port 3 Clock 0 (I) or EMIFA external input clock (I)
3.3 V
Video Port 3 Clock 1 or EMIFA output clock (O/Z)
VP3CLK0/AECLKIN
VP3CLK1/AECLKOU
T
VP3CTL0/ASDWE
T1
P1
I
IPD
IPD
I/O/Z
T2
I/O/Z
IPU
3.3 V
Video Port 3 Control 0 or Asynchronous memory write
enable/Programmable synchronous interface write-enable
Video Port 3 Control 1 or Asynchronous memory read/write (O/Z)
Video Port 3 Control 2 or Asynchronous/Programmable
synchronous memory output-enable (O/Z)
Video Port 3 Data 2 or EMIFA External Data 0
Video Port 3 Data 3 or EMIFA External Data 1
Video Port 3 Data 4 or EMIFA External Data 2
Video Port 3 Data 5 or EMIFA External Data 3
Video Port 3 Data 6 or EMIFA External Data 4
Video Port 3 Data 7 or EMIFA External Data 5
Video Port 3 Data 8 or EMIFA External Data 6
Video Port 3 Data 9 or EMIFA External Data 7
Video Port 3 Data 12 or EMIFA External Data 8
Video Port 3 Data 13 or EMIFA External Data 9
Video Port 3 Data 14 or EMIFA External Data 10
Video Port 3 Data 15 or EMIFA External Data 11
Video Port 3 Data 16 or EMIFA External Data 12
Video Port 3 Data 17 or EMIFA External Data 13
Video Port 3 Data 18 or EMIFA External Data 14
Video Port 3 Data 19 or EMIFA External Data 15
VIDEO PORT 4 OR EMIFA
3.3 V
Video Port 4 Clock 0 (I) or Asynchronous memory ready input (I)
3.3 V
Video Port 4 Clock 1
VP3CTL1/ARNW
VP3CTL2/AOE
R1
P2
I/O/Z
I/O/Z
IPU
IPU
3.3 V
3.3 V
VP3D02/AED00
VP3D03/AED01
VP3D04/AED02
VP3D05/AED03
VP3D06/AED04
VP3D07/AED05
VP3D08/AED06
VP3D09/AED07
VP3D12/AED08
VP3D13/AED09
VP3D14/AED10
VP3D15/AED11
VP3D16/AED12
VP3D17/AED13
VP3D18/AED14
VP3D19/AED15
T6
T5
T4
T3
R6
R5
R4
R3
R2
P6
P5
P4
P3
N4
N6
N5
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
I/O/Z
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
IPU
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
3.3 V
VP4CLK0/AARDY
VP4CLK1
L1
K1
I
IPU
IPD
I/O/Z
Device Overview
26
Submit Documentation Feedback
相關(guān)PDF資料
PDF描述
TMX320DM647ZUT900 Digital Media Processor
TMX320DM648ZUT720 Digital Media Processor
TMX320DM648ZUT900 Digital Media Processor
TMS320LC31PQL DIGITAL SIGNAL PROCESSORS
TMX320C6414TGLZ FIXED-POINT DIGITAL SIGNAL PROCESSORS
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
TMX320DM647ZUT900 制造商:TI 制造商全稱:Texas Instruments 功能描述:Digital Media Processor
TMX320DM648ACUT7 制造商:Texas Instruments 功能描述:- Trays
TMX320DM648ACUT9 制造商:Texas Instruments 功能描述:- Trays
TMX320DM648AZUT7 制造商:Texas Instruments 功能描述:
TMX320DM648CUT7 制造商:Texas Instruments 功能描述:- Trays