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6.6.2
EDMA Peripheral Register Description(s)
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 6-13. EDMA Channel Synchronization Events (continued)
TPCC
CHANN
EL
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
DEFAULT
EVENT#
BINARY
DEFAULT EVENT
TPCC
CHANNEL
DEFAULT
EVENT #
BINARY
DEFAULT EVENT
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
000 1111
001 0000
001 0001
001 0010
001 0011
001 0100
001 0101
001 0110
001 0111
001 1000
001 1001
001 1010
001 1011
001 1100
001 1101
001 1110
001 1111
McASP: AREVT
TIMER1 : TINT1L
TIMER1 : TINT1H
UART: URXEVT
UART: UTXEVT
VP0EVTYA
VP0EVTUA
VP0EVTVA
VP0EVTYB
VP0EVTUB
VP0EVTVB
VP1EVTYA
VP1EVTUA
VP1EVTVA
VP1EVTYB
VP1EVTUB
VP1EVTVB
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
010 1111
011 0000
011 0001
011 0010
011 0011
011 0100
011 0101
011 0110
011 0111
011 1000
011 1001
011 1010
011 1011
011 1100
011 1101
011 1110
011 1111
SPI: SPIREVT
VP4EVTYA
VP4EVTUA
VP4EVTVA
VP4EVTYB
VP4EVTUB
VP4EVTVB
GPIO : GPINT6
GPIO : GPINT7
GPIO : GPINT8
GPIO : GPINT9
GPIO : GPINT10
GPIO : GPINT11
GPIO : GPINT12
GPIO : GPINT13
GPIO : GPINT14
GPIO : GPINT15
Table 6-14
lists the EDMA registers, their corresponding acronyms, and DM648 device memory locations.
Table 6-14. DM647/DM648 EDMA Channel Controller Registers
HEX ADDRESS
0x02A0 0000
0x02A0 0004
0x02A0 0008 - 0x02A0 00FC
0x02A0 0100
0x02A0 0104
0x02A0 0108
0x02A0 010C
0x02A0 0110
0x02A0 0114
0x02A0 0118
0x02A0 011C
0x02A0 0120
0x02A0 0124
0x02A0 0128
0x02A0 012C
0x02A0 0130
0x02A0 0134
0x02A0 0138
0x02A0 013C
0x02A0 0140
0x02A0 0144
0x02A0 0148
ACRONYM
PID
CCCFG
REGISTER NAME
Peripheral ID Register
EDMA3CC Configuration Register
Reserved
DMA Channel 0 Mapping Register
DMA Channel 1 Mapping Register
DMA Channel 2 Mapping Register
DMA Channel 3 Mapping Register
DMA Channel 4 Mapping Register
DMA Channel 5 Mapping Register
DMA Channel 6 Mapping Register
DMA Channel 7 Mapping Register
DMA Channel 8 Mapping Register
DMA Channel 9 Mapping Register
DMA Channel 10 Mapping Register
DMA Channel 11 Mapping Register
DMA Channel 12 Mapping Register
DMA Channel 13 Mapping Register
DMA Channel 14 Mapping Register
DMA Channel 15 Mapping Register
DMA Channel 16 Mapping Register
DMA Channel 17 Mapping Register
DMA Channel 18 Mapping Register
DCHMAP0
DCHMAP1
DCHMAP2
DCHMAP3
DCHMAP4
DCHMAP5
DCHMAP6
DCHMAP7
DCHMAP8
DCHMAP9
DCHMAP10
DCHMAP11
DCHMAP12
DCHMAP13
DCHMAP14
DCHMAP15
DCHMAP16
DCHMAP17
DCHMAP18
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