
www.ti.com
P
5.3 Electrical Characteristics Over Recommended Ranges of Supply Voltage and Operating
Temperature (Unless Otherwise Noted)
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
PARAMETER
TEST CONDITIONS
(1)
MIN
TYP
MAX
UNIT
High-level output voltage (3.3-V I/O except
I2C pins)
V
OH
DV
DD33
= MIN, I
OH
= MAX
V
Low-level output voltage (3.3-V I/O except
I2C pins)
DV
DD33
= MIN, I
OL
= MAX
V
V
OL
Low-level output voltage (3.3-V I/O I2C
pins)
I
O
= 3 mA
V
V
I
= V
SS
to DV
DD33
without internal resistor
V
I
= V
SS
to DV
DD33
with internal pullup resistor
(2)
μ
A
μ
A
Input current [dc]
I
I
V
= V
to DV
with opposing internal
pulldown resistor
(2)
μ
A
Input current [dc] (I2C)
V
I
= V
SS
to DV
DD33
DDR2
μ
A
mA
I
OH
High-level output current [dc]
All other peripherals
mA
DDR2
mA
I
OL
Low-level output current [dc]
All other peripherals
mA
V
O
= DV
DD33
or V
SS
; internal pull disabled
V
O
= DV
DD33
or V
SS
; internal pull enabled
CV
DD
= 1.2-V, DSP clock = 720 MHz
CV
DD
= 1.2-V, DSP clock = 900 MHz
DV
DD
= 3.3-V, DSP clock = 720 MHz
DV
DD
= 3.3-V, DSP clock = 900 MHz
DV
DD
= 1.8-V, DSP clock = 720 MHz
μ
A
μ
A
mA
I
OZ
I/O Off-state output current
I
CDD
Core (CV
DD
, V
DDA_1P1V
) supply current
(3)
mA
mA
I
DDD
3.3-V I/O (DV
DD33
) supply current
(3)
mA
1.8-V I/O (DV
DDR2
, DDR_VDDDLL,
PLLV
P(3)
, V
DDA_1P8V
, MXV
DD
) supply
current
mA
I
DDD
DV
DD
= 1.8-V, DSP clock = 900 MHz
mA
C
I
C
o
Input capacitance
pF
Output capacitance
pF
(1)
(2)
(3)
For test conditions shown as MIN, MAX, or NOM, use the appropriate value specified in the recommended operating conditions table.
Applies only to pins with an internal pullup (IPU) or pulldown (IPD) resistor.
Measured under the following conditions.
Submit Documentation Feedback
Device Operating Conditions
55