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P
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 6-14. DM647/DM648 EDMA Channel Controller Registers
(continued)
HEX ADDRESS
0x02A0 04B8
0x02A0 04BC
0x02A0 04C0
0x02A0 04C4
0x02A0 04C8
0x02A0 04CC
0x02A0 04D0
0x02A0 04D4
0x02A0 04D8
0x02A0 04DC
0x02A0 04E0
0x02A0 04E4
0x02A0 04E8
0x02A0 04EC
0x02A0 04F0
0x02A0 04F4
0x02A0 04F8
0x02A0 04FC
0x02A0 0500 - 0x02A0 051C
0x02A0 0520 - 0x02A0 05FC
0x02A0 0600
0x02A0 0604
0x02A0 0608
0x02A0 060C
0x02A0 0610 - 0x02A0 061C
0x02A0 0620
0x02A0 0624
0x02A0 0640
0x02A0 0644 - 0x02A0 06FC
0x02A0 0700 - 0x02A0 0FFC
0x02A0 1000
0x02A0 1004
0x02A0 1008
0x02A0 100C
0x02A0 1010
0x02A0 1014
0x02A0 1018
0x02A0 101C
0x02A0 1020
0x02A0 1024
0x02A0 1028
0x02A0 102C
0x02A0 1030
0x02A0 1034
0x02A0 1038
0x02A0 103C
0x02A0 1040
ACRONYM
Q2E14
Q2E15
Q3E0
Q3E1
Q3E2
Q3E3
Q3E4
Q3E5
Q3E6
Q3E7
Q3E8
Q3E9
Q3E10
Q3E11
Q3E12
Q3E13
Q3E14
Q3E15
-
-
QSTAT0
QSTAT1
QSTAT2
QSTAT3
-
QWMTHRA
–
CCSTAT
-
-
ER
ERH
ECR
ECRH
ESR
ESRH
CER
CERH
EER
EERH
EECR
EECRH
EESR
EESRH
SER
SERH
SECR
REGISTER NAME
Event Queue 2 Entry Register 14
Event Queue 2 Entry Register 15
Event Queue 3 Entry Register 0
Event Queue 3 Entry Register 1
Event Queue 3 Entry Register 2
Event Queue 3 Entry Register 3
Event Queue 3 Entry Register 4
Event Queue 3 Entry Register 5
Event Queue 3 Entry Register 6
Event Queue 3 Entry Register 7
Event Queue 3 Entry Register 8
Event Queue 3 Entry Register 9
Event Queue 3 Entry Register 10
Event Queue 3 Entry Register 11
Event Queue 3 Entry Register 12
Event Queue 3 Entry Register 13
Event Queue 3 Entry Register 14
Event Queue 3 Entry Register 15
Reserved
Reserved
Queue 0 Status Register
Queue 1 Status Register
Queue Status Register 2
Queue Status Register 3
Reserved
Queue Watermark Threshold A Register for Q[3:0]
Reserved
EDMA3CC Status Register
Reserved
Reserved
Event Register
Event Register High
Event Clear Register
Event Clear Register High
Event Set Register
Event Set Register High
Chained Event Register
Chained Event Register High
Event Enable Register
Event Enable Register High
Event Enable Clear Register
Event Enable Clear Register High
Event Enable Set Register
Event Enable Set Register High
Secondary Event Register
Secondary Event Register High
Secondary Event Clear Register
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Peripheral Information and Electrical Specifications
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