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| 型號(hào)： | TMX320DM647ZUT720 |
| 廠商： | Texas Instruments, Inc. |
| 英文描述： | Digital Media Processor |
| 中文描述： | 數(shù)字媒體處理器 |
| 文件頁(yè)數(shù)： | 23/166頁(yè) |
| 文件大?。?/td> | 1341K |
| 代理商： | TMX320DM647ZUT720 |
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P
TMS320DM647/TMS320DM648
Digital Media Processor
SPRS372–MAY 2007
Table 2-4. TERMINAL FUNCTIONS (continued)
TERMINAL NAME
NO
TYPE
INTERNAL
PULLUP/
PULLDOWN
OPER
VOLT
DESCRIPTION
CONFIGURATION AND EMIFA
3.3 V
DEVICEENABLE0/AE
A20
F2
I/O/Z
IPD
EMIFA External Address 20 (word address) (O/Z) For proper
device operation, this pin must be externally pulled up with a 1-k
resistor at device reset
EMIFA External Address 22 (word address) (O/Z) EMIFA data bus
width selection pin state captured at the rising edge of RESET.
0 sets EMIFA CS2 to 8 bit data bus width
1 sets EMIFA CS2 to 16 bit data bus width. For details. see
Section 3
.
EMIFA External Address 22 (word address) (O/Z) Enables FAST
BOOT of the device. For details see
Section 3
.
UHPI enable pin. This pin controls the selection (enable/disable) of
the HPI and GPIO[0:7] muxed with PCI. For details see
Section 3
.
EMIFA External Address 16 (word address) (O/Z) HPI peripheral
bus width (HPI_WIDTH) select [Applies only when HPI is enabled;
UHPIEN pin = 1]
EMIFA External Address 15 (word address) (O/Z) For proper
device operation, this pin must be externally pulled up with a 1-k
resistor at device reset
PCI Frequency Selection (PCI66). The PCI peripheral must be
enabled (UHPIEN = 0) to use this function.PCI66_AEA18 selects
the PCI operating frequency of 66 MHz or 33 MHz. PCI operating
frequency is selected at reset via the pullup/pulldown resistor on
the PCI66 pin:AEA18:
0 - PCI operates at 33 MHz (default)
1 - PCI operates at 66 MHz.
0000
Master mode - Emulation Boot
0001
Slave mode - HPI Boot (if UHPIEN = 1)
or PCI Boot (if UHPIEN = 0) without auto-initialization
0010
Slave mode - HPI Boot (if UHPIEN = 1)
or PCI Boot (if UHPIEN = 0) with auto-initialization
0011
Master mode - UART boot without flow control
0100
Master mode - EMIFA CS2 direct/fast boot
0101
Master mode - I2C boot
0110
Master mode - SPI boot
0111
Reserved
1000
Master mode - 3-port Ethernet Subsystem boot through
SGMII0 for DM647 only
Reserved in DM648
1001
Master mode - 3-port Ethernet Subsystem boot through
SGMII0 for DM648 only
Reserved in DM647
1010
Master mode - 3-port Ethernet Subsystem boot through
SGMII1 for DM648 only
Reserved in DM647
1011
Reserved
1100
Reserved
1101
Reserved
1110
Master mode - UART boot with flow control
1111
Reserved
INTER-INTEGRATED CIRCUIT (I2C)
3.3 V
I2C clock. When the I2C module is used, use an external pullup
resistor.
3.3 V
I2C data. When I2C is used, make certain there is an external
pullup resistor.
EMIFAWIDTH/AEA22
G3
I/O/Z
IPD
3.3 V
FASTBOOT/AEA21
G2
I/O/Z
IPD
3.3 V
UHPIEN
H2
I
IPD
3.3 V
HPIWIDTH/AEA16
H3
I/O/Z
IPD
3.3 V
RSVBOOT/AEA15
H6
I/O/Z
IPU
3.3 V
PCI66/AEA18
G5
I/O/Z
IPD
3.3 V
BOOTMODE0/AEA11
BOOTMODE1/AEA12
BOOTMODE2/AEA13
BOOTMODE3/AEA14
F3
F4
F5
G6
I/O/Z
IPD
3.3 V
SCL0
D22
I/O/Z
SDA0
C23
I/O/Z
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Device Overview
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