參數(shù)資料
型號(hào)： TMX320C6412GNZ
廠商： Texas Instruments, Inc.
英文描述： Signal Processor
中文描述： 信號(hào)處理器
文件頁數(shù)： 61/159頁
文件大小： 1989K
代理商： TMX320C6412GNZ
Configuration Examples
61
April 2003 Revised June 2004
SPRS219D
Table 29. C6412 Device Multiplexed Pins
(Continued)
DESCRIPTION
SETTING
FUNCTION
MULTIPLEXED PINS
NAME
DEFAULT
DEFAULT
NO.
XSP_CLK/MDCLK
R5
None
PCI_EN = 0 (disabled)
MAC_EN = 0
(disabled)
By default, no functions enabled upon reset (PCI is
disabled).
To enable the PCI peripheral, an external pullup resistor
(1 k
) must be provided on the PCI_EN pin (setting
PCI_EN = 1 at reset)
To enable the MDIO peripheral (which also enables the
EMAC peripheral), an external pullup resistor (1 k
) must be
provided on the MAC_EN pin (setting MAC_EN = 1 at reset)
XSP_DO/MDIO
P5
HAS/PPAR
P3
HAS
HCNTL1/PDEVSEL
P1
HCNTL1
HCNTL0/PSTOP
R3
HCNTL0
HDS1/PSERR
R2
HDS1
HDS2/PCBE1
T2
HDS2
By default, HPI is enabled upon reset (PCI is disabled).
To enable the PCI peripheral, an external pullup resistor
(1 k
) must be provided on the PCI_EN pin (setting
PCI_EN = 1 at reset).
HR/W/PCBE2
M1
HR/W
PCI_EN = 0 (disabled)
HHWIL/PTRDY
N3
HHWIL
(HPI16 only)
HINT/PFRAME
N4
HINT
HCS/PPERR
R1
HCS
HRDY/PIRDY
N1
HRDY
HD[23,15:0]/AD[23,15:0]
HD[23, 15:0]
PCI_EN = 0 (disabled)
By default, HPI is enabled upon reset (PCI is disabled).
To enable the PCI peripheral, an external pullup resistor
(1 k
) must be provided on the PCI_EN pin (setting
PCI_EN = 1 at reset).
HD31/AD31/MRCLK
G1
HD31
HD30/AD30/MCRS
H3
HD30
HD29/AD29/MRXER
G2
HD29
HD28/AD28/MRXDV
J4
HD28
HD27/AD27/MRXD3
H2
HD27
HD26/AD26/MRXD2
J3
HD26
By default, HPI is enabled upon reset (PCI is disabled).
To enable the PCI peripheral, an external pullup resistor
(1 k
) must be provided on the PCI_EN pin (setting
To enable the EMAC peripheral, an external pullup resistor
(1 k
) must be provided on the MAC_EN pin (setting
MAC_EN = 1 at reset).
HD25/AD25/MRXD1
J1
HD25
PCI_EN = 0 (disabled)
(disabled)
HD24/AD24/MRXD0
K4
HD24
HD22/AD22/MTCLK
L4
HD22
MAC_EN = 0
PCI_EN = 1 at reset).
HD21/AD21/MCOL
K2
HD21
HD20/AD20/MTXEN
L3
HD20
HD19/AD19/MTXD3
L2
HD19
HD18/AD18/MTXD2
M4
HD18
HD17/AD17/MTXD1
M2
HD17
HD16/AD16/MTXD0
All other standalone PCI pins are tied-off internally (pins in Hi-Z) when the peripheral is disabled [PCI_EN = 0].
For the HD[31:0]/AD[31:0] multiplexed pins pin numbers, see the
Terminal Functions
table.
M3
HD16
2.9
Configuration Examples
Figure 26
illustrates an example of peripheral selections that are configurable on the C6412
device.
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