參數(shù)資料
型號: TMX320C6412GNZ
廠商: Texas Instruments, Inc.
英文描述: Signal Processor
中文描述: 信號處理器
文件頁數(shù): 59/159頁
文件大小: 1989K
代理商: TMX320C6412GNZ
Device Configurations
59
April 2003 Revised June 2004
SPRS219D
2.7
Multiplexed Pins
Multiplexed pins are pins that are shared by more than one peripheral and are internally multiplexed. Some
of these pins are configured by software, and the others are configured by external pullup/pulldown resistors
only at reset. Those muxed pins that are configured by software should
not
be programmed to switch
functionalities during run-time. Those muxed pins that are configured by external pullup/pulldown resistors
are mutually exclusive; only one peripheral has primary control of the function of these pins after reset.
Table 29 identifies the multiplexed pins on the C6412 device; shows the default (primary) function and the
default settings after reset; and describes the pins, registers, etc. necessary to configure specific multiplexed
functions.
2.8
Debugging Considerations
It is recommended that external connections be provided to device configuration pins, including
TOUT1/LENDIAN, AEA[22:19], GP0[3]/PCIEEAI, GP0[8]/PCI66, HD5/AD5, PCI_EN, and TOUT0/MAC_EN.
Although internal pullup/pulldown resistors exist on these pins, providing external connectivity adds
convenience to the user in debugging and flexibility in switching operating modes.
Internal pullup/pulldown resistors also exist on the non-configuration pins on the AEA bus (AEA[18:0]). Do
not
oppose the internal pullup/pulldown resistors on these non-configuration pins with external pullup/pulldown
resistors. If an external controller provides signals to these non-configuration pins, these signals must be
driven to the default state of the pins at reset, or not be driven at all.
For the internal pullup/pulldown resistors for all device pins, see the terminal functions table.
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